Efficient Simulation of Formal Processor Models
Formal Methods in System Design
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We have written a new records library for modelling fixed-size arrays and linear memories. Our implementation provides fixnum-optimized O(log2 n) reads and writes from addresses 0, 1,..., n - 1. Space is not allocated until locations are used, so large address spaces can be represented. We do not use single-threaded objects or ACL2 arrays, which frees the user from syntactic restrictions and slow-array warnings. Finally, we can prove the same hypothesis-free rewrite rules found in misc/records for efficient rewriting during theorem proving.