Use of monitors in FORTRAN: a tutorial on the barrier, self-scheduling DO-loop, and askfor monitors
on Parallel MIMD computation: HEP supercomputer and its applications
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Computer
A Single Program Multiple Data Parallel Processing Platform for FPGAs
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Symmetric Multiprocessing on Programmable Chips Made Easy
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
HW/SW methodologies for synchronization in FPGA multiprocessors
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A reconfigurable multiprocessor architecture for a reliable face recognition implementation
Proceedings of the Conference on Design, Automation and Test in Europe
Prototyping hardware support for irregular applications
Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
| Hi-index | 0.00 |
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template architecture. Our framework permits to write a parallel application by using a shared memory model. It deals with the consistency of shared data, with no need of hardware coherence protocol, but uses a software model to properlyallsynchronize the local copies with the shared memory image. This idea can be applied both to a scratchpad-based architecture or a cache-based one. The architecture is synthesizable with standard IPs, such as the softcores and interconnect elements, which may be found in any commercial FPGA toolset.