Improving DES coprocessor throughput for short operations

  • Authors:
  • Mark Lindemann;Sean W. Smith

  • Affiliations:
  • IBM TJ Watson Research Center, Yorktown Heights, NY;Dept. of CS/Institute for Security and Technology Studies, Dartmouth College, Hanover, NH

  • Venue:
  • SSYM'01 Proceedings of the 10th conference on USENIX Security Symposium - Volume 10
  • Year:
  • 2001

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Abstract

Over the last several years, our research team built a commercially-offered secure coprocessor that, besides other features, offers high-speed DES: over 20 megabytes/second. However, it obtains these speeds only on operations with large data lengths. For DES operations on short data (e.g., 8-80 bytes), our commercial offering was benchmarked at less than 2 kilobytes/second. The programmability of our device enabled us to investigate this issue, identify and address a series of bottlenecks that were not initially apparent, and ultimately bring our short-DES performance close to 3 megabytes/second. This paper reports the results of this real-world systems exercise in hardware cryptographic acceleration--and demonstrates the importance of, when designing specialty hardware, not overlooking the software aspects governing how a device can be used.