Adding a vector unit to a superscalar processor
ICS '99 Proceedings of the 13th international conference on Supercomputing
Vector instruction set support for conditional operations
Proceedings of the 27th annual international symposium on Computer architecture
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Scalable Vector Media-processors for Embedded Systems
Scalable Vector Media-processors for Embedded Systems
Scientific Computations on Modern Parallel Vector Systems
Proceedings of the 2004 ACM/IEEE conference on Supercomputing
Intel Virtualization Technology
Computer
Vector processing as a soft-core CPU accelerator
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
VESPA: portable, scalable, and flexible FPGA-based vector processors
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
An out-of-order vector processing mechanism for multimedia applications
Proceedings of the 9th conference on Computing Frontiers
Portable, flexible, and scalable soft vector processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 4.10 |
A vector case study shows how new functionality can be added to extend the 80x86 and PowerPC architectures to support a full vector architecture, primarily by enhancing their multimedia extensions to provide a better model for compilers and an easier-to-understand model for programmers.