Stimulus generation for interface protocol verification using the nondeterministic extended finite state machine model

  • Authors:
  • Che-Hua Shih;Juinn-Dar Huang;Jing-Yang Jou

  • Affiliations:
  • Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan;Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan;Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan

  • Venue:
  • HLDVT '05 Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International
  • Year:
  • 2005

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Abstract

Deterministic functional test pattern generation has been a long-standing open problem, which is an important problem to be solved for both design verification and manufacturing testing. One key to develop a practical functional test pattern generation ...