A Low Power Algorithm for Sparse System Identification using Cross-Correlation
Journal of VLSI Signal Processing Systems
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This paper presents the implementation and performance evaluation of sparse-tap adaptive FIR filters with tap-position control. For the reduction of computational costs, a small number of filter coefficients are assigned to significant regions in the impulse response. A floating-point digital signal processor (DSP) ADSP-21020 is used for the implementation. For one second of end-to-end delay and 32 milliseconds of total significant-region length, the number of computations is reduced to almost one-tenth compared with a full-tap FIR adaptive filter using the same DSP. Experimental results using a telephone network simulator show that the implemented echo canceller reduces the echo by almost 20 dB for both white-noise and real speech signals. Tracking performance for phase rolls and flat-delay changes is also examined.