Parallel FFT Algorithms for Cache Based Shared Memory Multiprocessors

Authors:
Akhilesh Kumar;Laxmi N. Bhuyan
Affiliations:
Texas A&M University, USA;Texas A&M University, USA
Venue:
ICPP '93 Proceedings of the 1993 International Conference on Parallel Processing - Volume 03
Year:
1993

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Cache Performance and Algorithm Optimization

HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97

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Abstract

Shared memory multiprocessors with cache require careful consideration of cache parameters while implementing an algorithm to obtain optimal performance. In this paper, we study the implementation of some existing FFT algorithms and analyze the number of cache misses based on the problem size, number of processors, cache size, and block size. We also propose a new FFT algorithm which minimizes the number of cache misses.