Performance Analysis of Combining Multistage Interconnection Networks

Authors:
Prasant Mohapatra;Sheldon Wong;Chita R. Das
Affiliations:
Iowa State University, USA;The Pennsylvania State University, USA;The Pennsylvania State University, USA
Venue:
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Year:
1994

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Abstract

Concurrent access to a shared variable may cause network saturation in parallel computers. This problem, commonly termed as hot spot contention, can be alliviated by combining requests destined to the hot memory module. In this paper, we propose an analytical model to predict performance of combining multistage interconnection networks. The model considers realistic assumptions like finite length buffers in the switches, deterministic service time, finite degree of combining. Simulation results are used to validate the analytical model.