Understanding sources of inefficiency in general-purpose chips
Proceedings of the 37th annual international symposium on Computer architecture
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Understanding sources of ineffciency in general-purpose chips
Communications of the ACM
Evaluation of an accelerator architecture for speckle reducing anisotropic diffusion
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Energy-Efficient Pipeline Templates for High-Performance Asynchronous Circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
PGCapping: exploiting power gating for power capping and core lifetime balancing in CMPs
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
Resource efficient computing for warehouse-scale datacenters
Proceedings of the Conference on Design, Automation and Test in Europe
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In the mid 1980's the power growth that accompanied scaling forced the industry to focus on CMOS technology, and leave nMOS and bipolars for niche applications. Now 20 years later, CMOS technology is facing power issues of its own. After first reviewing the "cause of the problem, it will become clear that there are not easy solutions this time no new technology or simple system/circuit change will rescue us. Power, and not number of devices is now the primary limiter of chip performance, and the need to create power efficient designs is changing how we do design. This talk will review power optimized design methods and shows how power is strongly tied to performance and that variability aversely effects power efficiency. Projecting forward, it shows that unless die size shrinks, in future technologies most of the devices will need to be idle most of the time which has strong ramifications for the both the underlying device and system design.