Interframe Bus Encoding Technique for Low Power Video Compression

Authors:
Asral Bahari;Tughrul Arslan;Ahmet T. Erdogan
Affiliations:
University of Edinburgh, UK;University of Edinburgh, UK;University of Edinburgh, UK
Venue:
VLSID '07 Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems
Year:
2007

Citing 0
Cited 2

On-Chip Communication Architectures: System on Chip Interconnect

On-Chip Communication Architectures: System on Chip Interconnect
Interframe bus encoding technique and architecture for MPEG-4 AVC/H.264 video compression

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper proposes a data encoder to reduce switched capacitance on system bus. Our method focuses on transferring raw video data (pixels) between off-chip memory and on-chip memory which is common in video compression applications. This method is based on entropy coding to minimize bus transition. The existing technique exploits the correlation between neighbouring pixels. In our technique, we exploit pixel correlation between two consecutive frames. Our method shows 54% transition saving when combined with the existing technique which is equivalent to 38% power saving for 15pF off-chip bus capacitance. This method is suitable for applications where multiple frames are transferred from off-chip memories such as in MPEG-4 AVC/H.264 encoder.