Techniques for improving the performance of sparse matrix factorization on multiprocessor workstations

  • Authors:

  • Edward Rothberg;Anoop Gupta

  • Affiliations:

  • Department of Computer Science, Stanford University, Stanford, CA;Department of Computer Science, Stanford University, Stanford, CA

  • Venue:
  • Proceedings of the 1990 ACM/IEEE conference on Supercomputing
  • Year:
  • 1990

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Abstract

In this paper we study the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achieve only a small fraction of this potential. A major limiting factor is the cost of performing memory accesses. In this paper, we describe a parallel factorization code which utilizes the supernodal structure of the matrix to substantially reduce the number of memory references. We also propose enhancements that significantly reduce the overall cache miss rate. The result is greatly increased factorization performance. We present experimental results from executions on the Silicon Graphics 4D/380 multiprocessor. Using eight processors, the parallel supernodal code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as previously used parallel nodal approaches.