Cyclostationary feature detection on a tiled-SoC

  • Authors:

  • André B. J. Kokkeler;Gerard J. M. Smit;Thijs Krol;Jan Kuper

  • Affiliations:

  • University of Twente, The Netherlands;University of Twente, The Netherlands;University of Twente, The Netherlands;University of Twente, The Netherlands

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2007

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Abstract

In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known from the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 × 127 Discrete Spectral Correlation Function requires approximately 140 μs on a tiled System on Chip (SoC) with 4 Montium cores.