Constant propagation with conditional branches
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Global code motion/global value numbering
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
A new algorithm for partial redundancy elimination based on SSA form
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Array SSA form and its use in parallelization
POPL '98 Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Building an optimizing compiler
Building an optimizing compiler
Lx: a technology platform for customizable VLIW embedded processing
Proceedings of the 27th annual international symposium on Computer architecture
Efficient static single assignment form for predication
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
LCPC '96 Proceedings of the 9th International Workshop on Languages and Compilers for Parallel Computing
Effective Representation of Aliases and Indirect Memory Operations in SSA Form
CC '96 Proceedings of the 6th International Conference on Compiler Construction
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Modern compiler implementations use the Static Single Assignment representation [5] as a way to efficiently implement optimizing algorithms. However this representation is not well adapted to architectures with a predicated instruction set. The ψ-SSA representation was first introduced in [11] as an extension to the Static Single Assignment representation. The ψ-SSA representation extends the SSA representation such that standard SSA algorithms can be easily adapted to an architecture with a fully predicated instruction set. A new pseudo operation, the ψ operation, is introduced to merge several conditional definitions into a unique definition. This paper presents an adaptation of the ψ-SSA representation to support architectures with a partially predicated instruction set. The definition of the ψ operation is extended to support the generation and the optimization of partially predicated code. In particular, a predicate promotion transformation is introduced to reduce the number of predicated operations, as well as the number of operations used to compute guard registers. An out of ψ-SSA algorithm is also described, which fixes and improves the algorithm described in [11]. This algorithm is derived from the out of SSA algorithm from Sreedhar et al. [10], where the definitions of liveness and interferences have been extended for the ψ operations. This algorithm inserts predicated copy operations to restore the correct semantics in the program in a non-SSA form. The ψ-SSA representation is used in our production compilers, based on the Open64 technology, for the ST200 family processors. In this compiler, predicated code is generated by an if-conversion algorithm performed under the ψ-SSA representation [12, 1].