Simultaneous multithreading: maximizing on-chip parallelism
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading
ACM Transactions on Computer Systems (TOCS)
Pentium 4 Performance-Monitoring Features
IEEE Micro
A Portable Programming Interface for Performance Evaluation on Modern Processors
International Journal of High Performance Computing Applications
Hardware performance monitoring for the rest of us: a position and survey
NPC'11 Proceedings of the 8th IFIP international conference on Network and parallel computing
Metronome: operating system level performance management via self-adaptive computing
Proceedings of the 49th Annual Design Automation Conference
| Hi-index | 0.00 |
Recent microprocessor advances have significantly improved the capabilities of on-chip performance monitoring hardware, as is evident in the Pentium 4 processor (Sprunt 2002a). However, the complexity of the performance monitoring hardware has also risen, making the tasks of understanding and using the performance monitoring hardware much more difficult for performance analysts and software developers. Additionally, documentation for these features is becoming increasingly cryptic (Intel Corporation a), further exacerbating the task of using these features effectively. This paper describes a new approach for managing this complexity that enables the full feature set of this hardware to be used while still providing a highlevel, easy-to-use interface. This approach augments reference manual documentation by creating XML descriptions of the performance monitoring hardware capabilities and its desired configuration. This XML-based approach was used to develop the brink and abysstools (Sprunt), which provide high-level interface to the Pentium 4 performance monitoring capabilities.