Model-checking of real-time systems: a telecommunications application: experience report
ICSE '97 Proceedings of the 19th international conference on Software engineering
Extending Statecharts with Temporal Logic
IEEE Transactions on Software Engineering
Model-checking continuous-time Markov chains
ACM Transactions on Computational Logic (TOCL)
Verification of randomized distributed algorithms
Lectures on formal methods and performance analysis
Automatic verification of real-time systems with discrete probability distributions
Theoretical Computer Science
Markov decision processes and deterministic Büchi automata
Fundamenta Informaticae
ProbVerus: Probabilistic Symbolic Model Checking
ARTS '99 Proceedings of the 5th International AMAST Workshop on Formal Methods for Real-Time and Probabilistic Systems
Probabilistic Verification of Discrete Event Systems Using Acceptance Sampling
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Specification and Verification of Real-Time Properties Using LOTOS and SQTL
IWSSD '96 Proceedings of the 8th International Workshop on Software Specification and Design
Model checking for a probabilistic branching time logic with fairness
Distributed Computing
Strict Divergence for Probabilistic Timed Automata
CONCUR 2009 Proceedings of the 20th International Conference on Concurrency Theory
A theory of stochastic systems part I: Stochastic automata
Information and Computation
Markov Decision Processes and Deterministic Büchi Automata
Fundamenta Informaticae
A maximal entropy stochastic process for a timed automaton,
ICALP'13 Proceedings of the 40th international conference on Automata, Languages, and Programming - Volume Part II
Transient analysis of networks of stochastic timed automata using stochastic state classes
QEST'13 Proceedings of the 10th international conference on Quantitative Evaluation of Systems
Model checking for probabilistic timed automata
Formal Methods in System Design
Bayesian statistical model checking with application to Stateflow/Simulink verification
Formal Methods in System Design
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