A programmable voltage reference optimized for power management applications

  • Authors:

  • Filipe G. Ramos;Laercio Caldeira;Tales C. Pimenta

  • Affiliations:

  • FreeSCale, Jaguariuna, Brazil;UNIFEI, Itajuba, Brazil;UNIFEI, Itajuba, Brazil

  • Venue:
  • Proceedings of the 20th annual conference on Integrated circuits and systems design
  • Year:
  • 2007

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Abstract

A 3 bits programmable, low drift, high PSRR and high precision voltage reference, optimized to Power Management (PM) applications, is presented. The topology is based on a high performance bandgap voltage reference applied to a non-inverting amplifier stage, which generates an internal voltage reference of 2.4V, isolated by a buffer and derived by resistor dividers, generating eight selectable output voltages from 0 to 2.1V, chosen by an analog multiplexer. It has been successfully verified in a standard 0.35µm CMOS process. The experimental results have confirmed that, for power supply of 3.0V to 3.3V, and -20oC to 80oC temperature range, the programmable output voltage VREF has a worst case precision of ±3%.