Parallel and serial concatenated single parity check product codes

  • Authors:
  • David M. Rankin;T. Aaron Gulliver;Desmond P. Taylor

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Canterbury, Christchurch, New Zealand;Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC, Canada;Department of Electrical and Computer Engineering, University of Canterbury, Christchurch, New Zealand

  • Venue:
  • EURASIP Journal on Applied Signal Processing
  • Year:
  • 2005

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Abstract

The parallel and serial concatenation of codes is well established as a practical means of achieving excellent performance. In this paper, we introduce the parallel and serial concatenation of single parity check (SPC) product codes. The weight distribution of these codes is analyzed and the performance is bounded. Simulation results confirm these bounds at high signal-to-noise ratios. The performance of these codes (and some variants) is shown to be quite good given the low decoding complexity and reasonably short blocklengths.