Digital systems design and prototyping (2nd ed.): using field programmable logic and hardware description languages
Digital Signal Processing: A Computer Science Perspective
Digital Signal Processing: A Computer Science Perspective
Writing Testbenches: Functional Verification of HDL Models, Second Edition
Writing Testbenches: Functional Verification of HDL Models, Second Edition
Real-Time Imaging - Special issue on software engineering
SIS-Stamp: an integrated inspection system for sheet prints in stamp printing application
Computers in Industry - Special issue: Machine vision
Geometry unit for analysis of warped image features on programmable chips
EURASIP Journal on Embedded Systems
Essential guide to semiconductors, the
Essential guide to semiconductors, the
Geometry unit for analysis of warped image features on programmable chips
EURASIP Journal on Embedded Systems
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This paper describes the design of a scalable high-performance vision system which is used in the application area of optical print inspection. The system is able to process hundreds of megabytes of image data per second coming from several high-speed/high-resolution cameras. Due to performance requirements, some functionality has been implemented on dedicated hardware based on a field programmable gate array (FPGA), which is coupled to a high-end digital signal processor (DSP). The paper discusses design considerations like partitioning of image processing algorithms between hardware and software. The main chapters focus on functionality implemented on the FPGA, including low-level image processing algorithms (flat-field correction, image pyramid generation, neighborhood operations) and advanced processing units (programmable arithmetic unit, geometry unit). Verification issues for the complex system are also addressed. The paper concludes with a summary of the FPGA resource usage and some performance results.