Fast interrupt priority management in operating system kernels

  • Authors:

  • Daniel Stodolsky;J. Bradley Chen;Brian N. Bershad

  • Affiliations:

  • School of Computer Science, Carnegie Mellon University, Pittsburgh, PA;School of Computer Science, Carnegie Mellon University, Pittsburgh, PA;Department of Computer Science and Engineering, University of Washington, Seattle, WA

  • Venue:
  • moas'93 USENIX Symposium on USENIX Microkernels and Other Kernel Architectures Symposium - Volume 4
  • Year:
  • 1993

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Abstract

In this paper we describe a new, low-overhead technique for manipulating processor interrupt state in an operating system kernel. Both uniprocessor and multiprocessor operating systems protect against uniprocessor deadlock and data corruption by selectively enabling and disabling interrupts during critical sections. This happens frequently during latency-critical activities such as IPC, scheduling, and memory management. Unfortunately, the cycle cost of modifying the interrupt mask has increased by an order of magnitude in recent processor architectures. In this paper we describe optimistic interrupt protection, a technique which substantially reduces the cost of interrupt masking by optimizing mask manipulation for the common case of no interrupts. We present results for the Mach 3.0 microkernel_operating_system,_although_the technique is applicable to other kernel architectures, both micro and monolithic, that rely on interrupts to manage devices.