Design and Implementation of a 50MHZ DXT CoProcessor

Authors:
Mohammad Amin Amiri;Reza Ebrahimi Atani;Sattar Mirzakuchaki;Mojdeh Mahdavi
Affiliations:
Iran University of Sci. and Technology;Iran University of Sci. and Technology;Iran University of Sci. and Technology;Islamic Azad University, Iran
Venue:
DSD '07 Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools
Year:
2007

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Design and Implementation of an Image CoProcessor

ICISP '08 Proceedings of the 3rd international conference on Image and Signal Processing

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Abstract

Frequency analysis using the DFT, the DHT, the DCT or the DST is an obvious choice for signal processing domain. This paper describes the implementation of a DXT coprocessor of transform length '8' for the synchronous design in a 0.22 LM Flash-based FPGA device (ACTEL). The total dynamic power of 359.24 mW, with an operating frequency of 50 MHz and an operating voltage of 2.5 V is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.