Parametric throughput analysis of synchronous data flow graphs
Proceedings of the conference on Design, automation and test in Europe
System-scenario-based design of dynamic embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
Input-driven dynamic execution prediction of streaming applications
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
RMOT: recursion in model order for task execution time estimation in a software pipeline
Proceedings of the Conference on Design, Automation and Test in Europe
DAGS: distribution agnostic sequential Monte Carlo scheme for task execution time estimation
Proceedings of the Conference on Design, Automation and Test in Europe
Worst-case performance analysis of synchronous dataflow scenarios
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Synchronous dataflow scenarios
ACM Transactions on Embedded Computing Systems (TECS)
Performance model checking scenario-aware dataflow
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Model checking of scenario-aware dataflow with CADP
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |
Electrical engineers have learned how to build amazingly complex systems by assembling transistors, wires, and passive components into intricate networks. While solidly founded in semiconductor physics, pure engineering has made possible the design of ...