An FPGA-based fault-tolerant 2D systolic array for matrix multiplications
Transactions on computational science XIII
Utilizing random noise in cryptography: where is the tofu?
Proceedings of the International Conference on Computer-Aided Design
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Elliptic curve cryptography plays a crucial role in networking and communication security. FPGA based architecture of elliptic curve cryptography coprocessor is proposed in this paper. The coprocessor is consisted of elements operation over binary finite fields, point adding and doubling on elliptic curve and scalar multiplication, and these modules are described in Verilog HDL. In this coprocessor a new type of FPGA-based modular multi- plier architecture is proposed for trade-off multiplication between bit serial and bit parallel. Experiment results show that coprocessor designed in this paper can achieve high performance. With the coprocessor embedded in PCI adaptor is realized for encryption and decryption.