Target prediction for indirect jumps
Proceedings of the 24th annual international symposium on Computer architecture
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
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The dual-core PA6T-1682M system on chip (SoC) is the first design in the PWRficient family of high-performance, low-power processor designs that target server-class performance with low power consumption. The heart of the PA6T-1682M is the PA6T core, which implements the 64-bit IBM Power Architecture. The SoC implements extensive features that support embedded and mobile low-power applications.