The bi-mode branch predictor

  • Authors:

  • Chih-Chieh Lee;I-Cheng K. Chen;Trevor N. Mudge

  • Affiliations:

  • EECS Department, University of Michigan, 1301 Beal Ave., Ann Arbor, Michigan;EECS Department, University of Michigan, 1301 Beal Ave., Ann Arbor, Michigan;EECS Department, University of Michigan, 1301 Beal Ave., Ann Arbor, Michigan

  • Venue:
  • MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
  • Year:
  • 1997

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Abstract

Dynamic branch predictors are popular because they can deliver accurate branch prediction without changes to the instruction set architecture or pre-existing binaries. However, to achieve the desired prediction accuracy, existing dynamic branch predictors require considerable amounts of hardware to minimize the interference effects due to aliasing in the prediction tables. We propose a new dynamic predictor, the bi-mode predictor, which divides the prediction tables into two halves and, by dynamically determining the current "mode" of the program, selects the appropriate half of the table for prediction. This approach is shown to preserve the merits of global history based prediction while reducing destructive aliasing and, as a result, improving prediction accuracy. Moreover, it is simple enough that it does not impact a processor's cycle time. We conclude by conducting a comprehensive study into the mechanism underlying two-level dynamic predictors and investigate the criteria for their optimal designs. The analysis presented provides a general framework for studying branch predictors.