An approach to reduce thread switch frequency for branch

Authors:
Lan Dong;X. M. Tang
Affiliations:
Computer Engineering Department, Beijing Jiaotong University, Beijing, China;Computer Engineering Department, Beijing Jiaotong University, Beijing, China
Venue:
DNCOCO'08 Proceedings of the 7th conference on Data networks, communications, computers
Year:
2008

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Abstract

Conditional branch prediction has been an important problem in recent years. With the development of parallel technology, the miss-prediction of conditional branch has given more and more effect on the system performance. The majority of solutions to this problem are to provide more hardware to predict the jump destination, but it costs more power and still leaves a fairly large space for prediction correctness to improve. In my previous research, a method was proposed to improve the prediction correctness by multithreading technology. Method proposed in this paper reduces the power dissipation of this previous method combined with branch predictor estimator as well as keeping fairly high performance.