A large, fast instruction window for tolerating cache misses
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
The Decoupled-Style Prefetch Architecture (Research Note)
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
An approach to reduce thread switch frequency for branch
DNCOCO'08 Proceedings of the 7th conference on Data networks, communications, computers
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