Introduction to algorithms
Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Fundamentals of neural networks: architectures, algorithms, and applications
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Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
The agree predictor: a mechanism for reducing negative branch history interference
Proceedings of the 24th annual international symposium on Computer architecture
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Proceedings of the 24th annual international symposium on Computer architecture
A language for describing predictors and its application to automatic synthesis
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MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Highly accurate data value prediction using hybrid predictors
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The SimpleScalar tool set, version 2.0
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An analysis of correlation and predictability: what makes two-level branch predictors work
Proceedings of the 25th annual international symposium on Computer architecture
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The YAGS branch prediction scheme
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Variable length path branch prediction
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
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Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Artificial Neural Networks for Image Understanding
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IEEE Micro
A study of branch prediction strategies
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Dynamic Branch Prediction with Perceptrons
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Improving branch prediction by understanding branch behavior
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IEEE Transactions on Computers
Improved composite confidence mechanisms for a perceptron branch predictor
Journal of Systems Architecture: the EUROMICRO Journal
Clustered indexing for branch predictors
Microprocessors & Microsystems
Computational and storage power optimizations for the O-GEHL branch predictor
Proceedings of the 4th international conference on Computing frontiers
Accurate branch prediction for short threads
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
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Proceedings of the 10th annual conference on Genetic and evolutionary computation
Generalizing neural branch prediction
ACM Transactions on Architecture and Code Optimization (TACO)
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DNCOCO'08 Proceedings of the 7th conference on Data networks, communications, computers
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Creating artificial global history to improve branch prediction accuracy
Proceedings of the 23rd international conference on Supercomputing
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International Journal of High Performance Systems Architecture
A novel meta predictor design for hybrid branch prediction
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A Predictive Model for Dynamic Microarchitectural Adaptivity Control
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Modulo path history for the reduction of pipeline overheads in path-based neural branch predictors
International Journal of Parallel Programming
Neural confidence estimation for more accurate value prediction
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
The combined perceptron branch predictor
Euro-Par'05 Proceedings of the 11th international Euro-Par conference on Parallel Processing
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Unbiased branches: an open problem
ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture
A power-aware alternative for the perceptron branch predictor
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Proceedings of the ACM International Conference on Computing Frontiers
Dynamic microarchitectural adaptation using machine learning
ACM Transactions on Architecture and Code Optimization (TACO)
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This article presents a new and highly accurate method for branch prediction. The key idea is to use one of the simplest possible neural methods, the perceptron, as an alternative to the commonly used two-bit counters. The source of our predictor's accuracy is its ability to use long history lengths, because the hardware resources for our method scale linearly, rather than exponentially, with the history length. We describe two versions of perceptron predictors, and we evaluate these predictors with respect to five well-known predictors. We show that for a 4 KB hardware budget, a simple version of our method that uses a global history achieves a misprediction rate of 4.6% on the SPEC 2000 integer benchmarks, an improvement of 26% over gshare. We also introduce a global/local version of our predictor that is 14% more accurate than the McFarling-style hybrid predictor of the Alpha 21264. We show that for hardware budgets of up to 256 KB, this global/local perceptron predictor is more accurate than Evers' multicomponent predictor, so we conclude that ours is the most accurate dynamic predictor currently available. To explore the feasibility of our ideas, we provide a circuit-level design of the perceptron predictor and describe techniques that allow our complex predictor to operate quickly. Finally, we show how the relatively complex perceptron predictor can be used in modern CPUs by having it override a simpler, quicker Smith predictor, providing IPC improvements of 15.8% over gshare and 5.7% over the McFarling hybrid predictor.