16-bit vs. 32-bit instructions for pipelined microprocessors
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Wisconsin Architectural Research Tool Set
ACM SIGARCH Computer Architecture News
The impact of operating system structure on memory system performance
SOSP '93 Proceedings of the fourteenth ACM symposium on Operating systems principles
Expected I-cache miss rates via the gap model
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Theoretical modeling of superscalar processor performance
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Throughput in a counterflow pipeline processor
ACM SIGARCH Computer Architecture News
Performance modeling using the Motorola PowerPC timing simulator
ACM SIGARCH Computer Architecture News
A compiler optimization to reduce execution time of loop nest
ACM SIGARCH Computer Architecture News
Correlation and aliasing in dynamic branch predictors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Evaluation of design alternatives for a multiprocessor microprocessor
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Can parallel algorithms enhance serial implementation?
Communications of the ACM
An educational tool for testing hierarchical multilevel caches
ACM SIGARCH Computer Architecture News
A discussion on non-blocking/lockup-free caches
ACM SIGARCH Computer Architecture News
The direct cost of virtual function calls in C++
Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
The case for a single-chip multiprocessor
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
A quantitative analysis of loop nest locality
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Exploiting dual data-memory banks in digital signal processors
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Improving cache performance with balanced tag and data paths
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Examination of a memory access classification scheme for pointer-intensive and numeric programs
ICS '96 Proceedings of the 10th international conference on Supercomputing
A scalable formal verification methodology for pipelined microprocessors
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Strategic directions in computer architecture
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
ACM SIGARCH Computer Architecture News
The impact of a zero-scan Internet checksumming mechanism
ACM SIGCOMM Computer Communication Review
hcc—a portable ANSI C compiler (with a code generator for the PowerPCs)
ACM SIGPLAN Notices
On the use of SPEC benchmarks in computer architecture research
ACM SIGARCH Computer Architecture News
Design techniques for high performance, energy efficient control logic
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Improved query performance with variant indexes
SIGMOD '97 Proceedings of the 1997 ACM SIGMOD international conference on Management of data
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
Concurrent Detection of Software and Hardware Data-Access Faults
IEEE Transactions on Computers
EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
From algorithm parallelism to instruction-level parallelism: an encode-decode chain using prefix-sum
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
Cache behavior of network protocols
SIGMETRICS '97 Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
System-level power optimization of special purpose applications: the beach solution
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Exploiting the locality of memory references to reduce the address bus energy
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
An extended addressing mode for low power
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Low power data processing by elimination of redundant computations
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Scalable instruction-level parallelism through tree-instructions
ICS '97 Proceedings of the 11th international conference on Supercomputing
Data caches for superscalar processors
ICS '97 Proceedings of the 11th international conference on Supercomputing
Speculative execution via address prediction and data prefetching
ICS '97 Proceedings of the 11th international conference on Supercomputing
Designing high bandwidth on-chip caches
Proceedings of the 24th annual international symposium on Computer architecture
The energy efficiency of IRAM architectures
Proceedings of the 24th annual international symposium on Computer architecture
Static timing analysis of embedded software
DAC '97 Proceedings of the 34th annual Design Automation Conference
Remembrance of things past: locality and memory in BDDs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Verifying correct pipeline implementation for microprocessors
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Initial results on the performance and cost of vector microprocessors
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Microarchitecture support for improving the performance of load target prediction
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Can program profiling support value prediction?
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Code placement techniques for cache miss rate reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multilevel Optimization of Pipelined Caches
IEEE Transactions on Computers
Partial Resolution in Branch Target Buffers
IEEE Transactions on Computers
Simulation of modern parallel systems: a CSIM-based approach
Proceedings of the 29th conference on Winter simulation
Timestamp representations for virtual sequences
Proceedings of the eleventh workshop on Parallel and distributed simulation
Simulation/evaluation environment for a VLIW processor architecture
IBM Journal of Research and Development - Special issue: performance analysis and its impact on design
A comparison of space requirements for short-circuit and full evaluation of Boolean expressions
ACM-SE 36 Proceedings of the 36th annual Southeast regional conference
A top-down design environment for developing pipelined datapaths
DAC '98 Proceedings of the 35th annual Design Automation Conference
Digital system simulation: methodologies and examples
DAC '98 Proceedings of the 35th annual Design Automation Conference
Using complementation and resequencing to minimize transitions
DAC '98 Proceedings of the 35th annual Design Automation Conference
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Explicit multi-threading (XMT) bridging models for instruction parallelism (extended abstract)
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
Computation-centric memory models
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
Modeling and optimizing I/O throughput of multiple disks on a bus (summary)
SIGMETRICS '98/PERFORMANCE '98 Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Kin: a high performance asynchronous processor architecture
ICS '98 Proceedings of the 12th international conference on Supercomputing
Execution characteristics of desktop applications on Windows NT
Proceedings of the 25th annual international symposium on Computer architecture
A Case for Two-Level Recovery Schemes
IEEE Transactions on Computers
Analysis of Cache-Related Preemption Delay in Fixed-Priority Preemptive Scheduling
IEEE Transactions on Computers
The memory fragmentation problem: solved?
Proceedings of the 1st international symposium on Memory management
Issues in cache management algorithms for commercial software systems
Proceedings of the 1st international workshop on Software and performance
A Low Power DSP Engine for Wireless Communications
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
Power-aware routing in mobile ad hoc networks
MobiCom '98 Proceedings of the 4th annual ACM/IEEE international conference on Mobile computing and networking
Hardware/software co-synthesis with memory hierarchies
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Formal verification of pipeline control using controlled token nets and abstract interpretation
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Simple vector microprocessors for multimedia applications
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Load latency tolerance in dynamically scheduled processors
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
The cascaded predictor: economical and adaptive branch target prediction
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Active disks: programming model, algorithms and evaluation
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
UTLB: a mechanism for address translation on network interfaces
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Investigating optimal local memory performance
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Precise miss analysis for program transformations with caches of arbitrary associativity
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
A processor desription language supporting retargetable multi-pipeline DSP program development tools
Proceedings of the 11th international symposium on System synthesis
Instruction encoding techniques for area minimization of instruction ROM
Proceedings of the 11th international symposium on System synthesis
Specification and verification of pipelining in the ARM2 RISC microprocessor
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Memory interfacing and instruction specification for reconfigurable processors
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
IEEE Transactions on Computers
An Algorithm for Optimally Exploiting Spatial and Temporal Locality in Upper Memory Levels
IEEE Transactions on Computers - Special issue on cache memory and related problems
Effects of Multithreading on Cache Performance
IEEE Transactions on Computers - Special issue on cache memory and related problems
Randomized Cache Placement for Eliminating Conflicts
IEEE Transactions on Computers - Special issue on cache memory and related problems
Cache conscious programming in undergraduate computer science
SIGCSE '99 The proceedings of the thirtieth SIGCSE technical symposium on Computer science education
A Practical Methodology for the Formal Verification of RISC Processors
Formal Methods in System Design
Commit-reconcile & fences (CRF): a new memory model for architects and compiler writers
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
A performance comparison of contemporary DRAM architectures
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Area efficient architectures for information integrity in cache memories
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Modeling and optimizing I/O throughput of multiple disks on a bus
SIGMETRICS '99 Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Power estimation for architectural exploration of HW/SW communication on system-level buses
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Round-like behavior in multiple disks on a bus
Proceedings of the sixth workshop on I/O in parallel and distributed systems
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Journal of VLSI Signal Processing Systems - special issue on multimedia signal processing
A locality sensitive multi-module cache with explicit management
ICS '99 Proceedings of the 13th international conference on Supercomputing
On the scheduling of variable latency functional units
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
Optimal replacements in caches with two miss costs
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
Teaching computer architecture with a new superscalar processor emulator
ITiCSE '99 Proceedings of the 4th annual SIGCSE/SIGCUE ITiCSE conference on Innovation and technology in computer science education
Data threaded microarchitecture
ACM SIGARCH Computer Architecture News
Temporal Partitioning and Scheduling Data Flow Graphs for Reconfigurable Computers
IEEE Transactions on Computers
Memory exploration for low power, embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Power efficient mediaprocessors: design space exploration
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
IEEE Transactions on Parallel and Distributed Systems
IP lookups using multiway and multicolumn search
IEEE/ACM Transactions on Networking (TON)
Using dynamic cache management techniques to reduce energy in a high-performance processor
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Selective instruction compression for memory energy reduction in embedded systems
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Effective exploitation of a zero overhead loop buffer
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Pipeline behavior prediction for superscalar processors by abstract interpretation
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Reliable benchmarks using numerical instability
SODA '94 Proceedings of the fifth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms
Cache performance analysis of traversals and random accesses
Proceedings of the tenth annual ACM-SIAM symposium on Discrete algorithms
Empirical investigation of the Markov reference model
Proceedings of the tenth annual ACM-SIAM symposium on Discrete algorithms
Linear-time register allocation for a fixed number of registers
Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms
An Easy-to-Use Approach for Practical Bus-Based System Design
IEEE Transactions on Computers
SPINE: a safe programmable and integrated network environment
Proceedings of the 8th ACM SIGOPS European workshop on Support for composing distributed applications
Dynamic 3D graphics workload characterization and the architectural implications
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Communications of the ACM
Quasi-Universal Switch Matrices for FPD Design
IEEE Transactions on Computers
Cache miss equations: a compiler framework for analyzing and tuning memory behavior
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimal Clustering of Hierarchical Hyper-Ring Multicomputers
The Journal of Supercomputing
A minimal TTL processor for architecture exploration
SAC '94 Proceedings of the 1994 ACM symposium on Applied computing
Performance of the hyper-ring multicomputer
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
Design and analysis of efficient application-specific on-line page replacement techniques
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Scal-Tool: pinpointing and quantifying scalability bottlenecks in DSM multiprocessors
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Cache-optimal methods for bit-reversals
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Memory characteristics of iterative methods
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
The processor-memory bottleneck: problems and solutions
Crossroads - Computer architecture
Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
Energy estimation for 32-bit microprocessors
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Instruction-level power estimation for embedded VLIW cores
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Program path analysis to bound cache-related preemption delay in preemptive real-time systems
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
IEEE Transactions on Computers
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated cache optimizations using CME driven diagnosis
Proceedings of the 14th international conference on Supercomputing
Making B+- trees cache conscious in main memory
SIGMOD '00 Proceedings of the 2000 ACM SIGMOD international conference on Management of data
Proceedings of the 37th Annual Design Automation Conference
Formal verification of iterative algorithms in microprocessors
Proceedings of the 37th Annual Design Automation Conference
Synthesis of application-specific memories for power optimization in embedded systems
Proceedings of the 37th Annual Design Automation Conference
Profile assisted register allocation
SAC '00 Proceedings of the 2000 ACM symposium on Applied computing - Volume 2
Efficient and Precise Cache Behavior Prediction for Real-TimeSystems
Real-Time Systems
Timing Analysis for Data and Wrap-Around Fill Caches
Real-Time Systems
Cache Aware Pre-Runtime Scheduling
Real-Time Systems
Dynamic power management using adaptive learning tree
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A methodology for correct-by-construction latency insensitive design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Memory bank customization and assignment in behavioral synthesis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
A no-busy-wait balanced tree parallel algorithmic paradigm
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
Multithreaded algorithms for the fast Fourier transform
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
Fast deterministic consensus in a noisy environment
Proceedings of the nineteenth annual ACM symposium on Principles of distributed computing
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A power reduction technique with object code merging for application specific embedded processors
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A recursive algorithm for low-power memory partitioning
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Supporting Timing Analysis by Automatic Bounding of LoopIterations
Real-Time Systems - Special issue on worst-case execution-time analysis
Timing Analysis for Instruction Caches
Real-Time Systems - Special issue on worst-case execution-time analysis
Matrix multiplication: a case study of enhanced data cache utilization
Journal of Experimental Algorithmics (JEA)
Debug Facilities in the TriMedia CPU64 Architecture
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Split-stream dictionary program compression
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Optimal instruction scheduling using integer programming
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Integer Multiplication with Overflow Detection or Saturation
IEEE Transactions on Computers - Special issue on computer arithmetic
Reflection as a mechanism for software integrity verification
ACM Transactions on Information and System Security (TISSEC)
Loop Shifting for Loop Compaction
International Journal of Parallel Programming - Special issue on instruction-level parallelism and parallelizing compilation, part 2
Location Consistency-A New Memory Model and Cache Consistency Protocol
IEEE Transactions on Computers
Designing computer systems with MEMS-based storage
ACM SIGPLAN Notices
OS and compiler considerations in the design of the IA-64 architecture
ACM SIGPLAN Notices
A Framework for Computer Performance Evaluation Using Benchmark Sets
IEEE Transactions on Computers
Eager writeback - a technique for improving bandwidth utilization
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Efficient checker processor design
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Efficient conditional operations for data-parallel architectures
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
The effect of reconfigurable units in superscalar processors
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Memory Hierarchy Considerations for Cost-Effective Cluster Computing
IEEE Transactions on Computers
Reconfigurable Filter Coprocessor Architecture for DSP Applications
Journal of VLSI Signal Processing Systems
Hierarchical Ring Network Configuration and Performance Modeling
IEEE Transactions on Computers
Retargetable compiled simulation of embedded processors using a machine description language
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Introducing computer systems from a programmer's perspective
Proceedings of the thirty-second SIGCSE technical symposium on Computer Science Education
Java Runtime Systems: Characterization and Architectural Implications
IEEE Transactions on Computers
Can entropy characterize performance of online algorithms?
SODA '01 Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms
Exploiting data forwarding to reduce the power budget of VLIW embedded processors
Proceedings of the conference on Design, automation and test in Europe
Cache conscious data layout organization for embedded multimedia applications
Proceedings of the conference on Design, automation and test in Europe
Testing DSP cores based on self-test programs
Proceedings of the conference on Design, automation and test in Europe
Instruction scheduling for power reduction in processor-based system design
Proceedings of the conference on Design, automation and test in Europe
Address bus encoding techniques for system-level power optimization
Proceedings of the conference on Design, automation and test in Europe
Hardware/software co-design of a fuzzy RISC processor
Proceedings of the conference on Design, automation and test in Europe
An application specific Java processor with reconfigurabilities
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
An analytical model of the HINT performance metric
Supercomputing '96 Proceedings of the 1996 ACM/IEEE conference on Supercomputing
A vector-pipeline DSP for low-rate videophones
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Reducing cache engery through dual voltage supply
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Performance modeling and tuning of an unstructured mesh CFD application
Proceedings of the 2000 ACM/IEEE conference on Supercomputing
A scalable cross-platform infrastructure for application performance tuning using hardware counters
Proceedings of the 2000 ACM/IEEE conference on Supercomputing
New directions in compiler technology for embedded systems (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A system level memory power optimization technique using multiple supply and threshold voltages
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Effectiveness of the ASIP design system PEAS-III in design of pipelined processors
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
IEEE Transactions on Parallel and Distributed Systems
ACM Transactions on Computational Logic (TOCL)
Parameterised system design based on genetic algorithms
Proceedings of the ninth international symposium on Hardware/software codesign
Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors
Journal of VLSI Signal Processing Systems - Special issue on multimedia signal processing
High Bandwidth On-Chip Cache Design
IEEE Transactions on Computers
Optimizing multidimensional index trees for main memory access
SIGMOD '01 Proceedings of the 2001 ACM SIGMOD international conference on Management of data
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Time Stamp Algorithms for Runtime Parallelization of DOACROSS Loops with Dynamic Dependences
IEEE Transactions on Parallel and Distributed Systems
Proceedings of the 38th annual Design Automation Conference
Efficient representations and abstractions for quantifying and exploiting data reference locality
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Designing computer systems with MEMS-based storage
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Proceedings of the 38th annual Design Automation Conference
A new verification methodology for complex pipeline behavior
Proceedings of the 38th annual Design Automation Conference
OS and compiler considerations in the design of the IA-64 architecture
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Irredundant address bus encoding for low power
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Low power address encoding using self-organizing lists
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Using types to analyze and optimize object-oriented programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Database Systems (TODS)
Using Cohort Scheduling to Enhance Server Performance (Extended Abstract)
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Improving memory performance of sorting algorithms
Journal of Experimental Algorithmics (JEA)
Fast priority queues for cached memory
Journal of Experimental Algorithmics (JEA)
Experiments with list ranking for explicit multi-threaded (XMT) instruction parallelism
Journal of Experimental Algorithmics (JEA)
Analysing cache effects in distribution sorting
Journal of Experimental Algorithmics (JEA)
Performance engineering case study: heap construction
Journal of Experimental Algorithmics (JEA)
Retargetable static timing analysis for embedded software
Proceedings of the 14th international symposium on Systems synthesis
Proceedings of the 14th international symposium on Systems synthesis
Dynamic modeling of inter-instruction effects for execution time estimation
Proceedings of the 14th international symposium on Systems synthesis
Bounding Cache-Related Preemption Delay for Real-Time Systems
IEEE Transactions on Software Engineering
Data memory design and exploration for low-power embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Heterogeneous memory management for embedded systems
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Hardware compilation of sequential ada
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Dynamic versioning concurrency control for index-based data access in main memory database systems
Proceedings of the tenth international conference on Information and knowledge management
Static and Dynamic Locality Optimizations Using Integer Linear Programming
IEEE Transactions on Parallel and Distributed Systems
HIP: hybrid interrupt-polling for the network interface
ACM SIGOPS Operating Systems Review
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation
IEEE Transactions on Computers - Special issue on the parallel architecture and compilation techniques conference
ED4I: Error Detection by Diverse Data and Duplicated Instructions
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
IEEE Transactions on Computers
High-Performance DRAMs in Workstation Environments
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SC '97 Proceedings of the 1997 ACM/IEEE conference on Supercomputing
Measuring memory hierarchy performance of cache-coherent multiprocessors using micro benchmarks
SC '97 Proceedings of the 1997 ACM/IEEE conference on Supercomputing
Efficient global register allocation for minimizing energy consumption
ACM SIGPLAN Notices
Performance prediction for random write reductions: a case study in modeling shared memory programs
SIGMETRICS '02 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
On the Boosting of Instruction Scheduling by Renaming
The Journal of Supercomputing
Using locality surfaces to characterize the SPECint 2000 benchmark suite
Workload characterization of emerging computer applications
Workload characterization of emerging computer applications
Quick piping: a fast, high-level model for describing processor pipelines
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
DRG-cache: a data retention gated-ground cache for low power
Proceedings of the 39th annual Design Automation Conference
Associative caches in formal software timing analysis
Proceedings of the 39th annual Design Automation Conference
The architecture of the DIVA processing-in-memory chip
ICS '02 Proceedings of the 16th international conference on Supercomputing
Execution history guided instruction prefetching
ICS '02 Proceedings of the 16th international conference on Supercomputing
Using predicate path information in hardware to determine true dependences
ICS '02 Proceedings of the 16th international conference on Supercomputing
Using the Alfa-1 simulated processor for educational purposes
Journal on Educational Resources in Computing (JERIC)
WWW visualisation of computer architecture simulations
Proceedings of the 7th annual conference on Innovation and technology in computer science education
Journal on Educational Resources in Computing (JERIC)
Journal on Educational Resources in Computing (JERIC)
LegoSim: simulation of embedded kernels over Pthreads
Journal on Educational Resources in Computing (JERIC)
Efficient dynamic scheduling through tag elimination
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Transient-fault recovery using simultaneous multithreading
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Implementing optimizations at decode time
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Cache oblivious search trees via binary trees of small height
SODA '02 Proceedings of the thirteenth annual ACM-SIAM symposium on Discrete algorithms
Teaching computer organization/architecture with limited resources using simulators
SIGCSE '02 Proceedings of the 33rd SIGCSE technical symposium on Computer science education
Trident: a scalable architecture for scalar, vector, and matrix operations
CRPIT '02 Proceedings of the seventh Asia-Pacific conference on Computer systems architecture
Sentry tag: an efficient filter scheme for low power cache
CRPIT '02 Proceedings of the seventh Asia-Pacific conference on Computer systems architecture
A capacity planning tool for the tuxedo middleware used in transaction processing systems
Proceedings of the 33nd conference on Winter simulation
Implementing database operations using SIMD instructions
Proceedings of the 2002 ACM SIGMOD international conference on Management of data
Dynamic Cluster Resource Allocations for Jobs with Known and Unknown Memory Demands
IEEE Transactions on Parallel and Distributed Systems
Design and evaluation of a conit-based continuous consistency model for replicated services
ACM Transactions on Computer Systems (TOCS)
Boolean satisfiability with transitivity constraints
ACM Transactions on Computational Logic (TOCL)
Low-leakage asymmetric-cell SRAM
Proceedings of the 2002 international symposium on Low power electronics and design
Reducing access energy of on-chip data memory considering active data bitwidth
Proceedings of the 2002 international symposium on Low power electronics and design
An adaptive serial-parallel CAM architecture for low-power cache blocks
Proceedings of the 2002 international symposium on Low power electronics and design
Reducing transitions on memory buses using sector-based encoding technique
Proceedings of the 2002 international symposium on Low power electronics and design
Codesign of embedded systems: status and trends
Readings in hardware/software co-design
Hardware/software co-synthesis with memory hierarchies
Readings in hardware/software co-design
Handling irreducible loops: optimized node splitting versus DJ-graphs
ACM Transactions on Programming Languages and Systems (TOPLAS)
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
Computer arithmetic and hardware: "off the shelf" microprocessors versus "custom hardware"
Theoretical Computer Science
Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol
IEEE Transactions on Parallel and Distributed Systems
Neural methods for dynamic branch prediction
ACM Transactions on Computer Systems (TOCS)
Proceedings of the twenty-first annual symposium on Principles of distributed computing
Timing analysis of embedded software for speculative processors
Proceedings of the 15th international symposium on System Synthesis
Modeling assembly instruction timing in superscalar architectures
Proceedings of the 15th international symposium on System Synthesis
Hardware implementation of the Ravenscar Ada tasking profile
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
An optimal memory allocation scheme for scratch-pad-based embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Formal Methods in System Design
Deriving Efficient Cache Coherence Protocols Through Refinement
Formal Methods in System Design
Efficient and effective branch reordering using profile data
ACM Transactions on Programming Languages and Systems (TOPLAS)
An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets
The Journal of Supercomputing
Information Systems Frontiers
Querying Compressed Data in Data Warehouses
Information Technology and Management
Compilation of Vector Statements of C[] Language for Architectures with Multilevel Memory Hierarchy
Programming and Computing Software
Power exploration for embedded VLIW architectures
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Synthesis of operation-centric hardware descriptions
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
An assembly-level execution-time model for pipelined architectures
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Speculative synchronization: applying thread-level speculation to explicitly parallel applications
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
A stateless, content-directed data prefetching mechanism
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Analysis of FPGA/FPIC switch modules
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic Intra-Register Vectorization for the Intel® Architecture
International Journal of Parallel Programming
Methodical Low-Power ASIP Design Space Exploration
Journal of VLSI Signal Processing Systems
Real-time sub-pixel cross bar position metrology
Real-Time Imaging
A PCI bus simulation framework and some simulation results on PCI Standard 2.1 latency limitations
Journal of Systems Architecture: the EUROMICRO Journal
Assessing the Performance of the New IBM SP2 Communication Subsystem
IEEE Parallel & Distributed Technology: Systems & Technology
Profit-Effective Parallel Computing
IEEE Concurrency
Computer
Codesign of Embedded Systems: Status and Trends
IEEE Design & Test
Random-Access Data Storage Components in Customized Architectures
IEEE Design & Test
Data Memory Organization and Optimizations in Application-Specific Systems
IEEE Design & Test
Developing Architectural Platforms: A Disciplined Approach
IEEE Design & Test
AMBA: Enabling Reusable On-Chip Designs
IEEE Micro
Starfire: Extending the SMP Envelope
IEEE Micro
The Virtual Interface Architecture
IEEE Micro
Generating Reliable Embedded Processors
IEEE Micro
The TigerSHARC DSP Architecture
IEEE Micro
SH-5: The 64-Bit SuperH Architecture
IEEE Micro
A Layout-Conscious Iteration Space Transformation Technique
IEEE Transactions on Computers
Cost-Effective Flow Table Designs for High-Speed Routers: Architecture and Performance Evaluation
IEEE Transactions on Computers
Server Capacity Planning for Web Traffic Workload
IEEE Transactions on Knowledge and Data Engineering
Gemini: An Optical Interconnection Network for Parallel Processing
IEEE Transactions on Parallel and Distributed Systems
Reconfigurable Instruction Set Processors from a Hardware/Software Perspective
IEEE Transactions on Software Engineering
Using moldability to improve the performance of supercomputer jobs
Journal of Parallel and Distributed Computing
Data page layouts for relational databases on deep memory hierarchies
The VLDB Journal — The International Journal on Very Large Data Bases
When the Herd Is Smart: Aggregate Behavior in the Selection of Job Request
IEEE Transactions on Parallel and Distributed Systems
Parallel simulation of chip-multiprocessor architectures
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Exposed vs. Encapsulated Approaches to Grid Service Archtecture
GRID '01 Proceedings of the Second International Workshop on Grid Computing
Memory Architectures for Embedded Systems-On-Chip
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
Data Layout Optimizations for Variable Coefficient Multigrid
ICCS '02 Proceedings of the International Conference on Computational Science-Part III
Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors
ICPP '97 Proceedings of the international Conference on Parallel Processing
A Novel Distributed Algorithm for High-Throughput and Scalable Gossiping
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
Selective Register Renaming: A Compiler-Driven Approach to Dynamic Register Renaming
HPCN Europe 2001 Proceedings of the 9th International Conference on High-Performance Computing and Networking
Reactive Computer Vision System with Reconfigurable Architecture
ICVS '99 Proceedings of the First International Conference on Computer Vision Systems
Run-Time Support to Register Allocation for Loop Parallelization of Image Processing Programs
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
A Class of Interconnection Networks for Multicasting
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Optimizing Graph Algorithms for Improved Cache Performance
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Design and Evaluation of a High-Level Interface for Data Mining
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Conflict-Free Access to Multiple Single-Ported Register Files
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Hybrid Predication Model for Instruction Level Parallelism
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Dynamic Power Management of Multiprocessor Systems
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Advanced Data Layout Optimization for Multimedia Applications
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
A PIM-based Multiprocessor System
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Implementations of Real-time Data Intensive Applications on PIM-based Multiprocessor Systems
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
A Novel Superscalar Architecture for Fast DCT Implementation
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
Parallelization Techniques for Spatial-Temporal Occupancy Maps from Multiple Video Streams
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
Utilizing Network Cache on an SCI-Based PC Cluster
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Fortran RED - A Retargetable Environment for Automatic Data Layout
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
Loop Shifting for Loop Compaction
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Ramp Up/Down Functional Unit to Reduce Step Power
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers
Algebraic Models of Superscalar Microprocessor Implementations: A Case Study
Proceedings of the ESPRIT Working Group 8533 on Prospects for Hardware Foundations: NADA - New Hardware Design Methods, Survey Chapters
Out-of-Core Solution of Large Linear Systems of Equations Arising from Stochastic Modelling
PAPM-PROBMIV '02 Proceedings of the Second Joint International Workshop on Process Algebra and Probabilistic Methods, Performance Modeling and Verification
Typing Assembly Programs with Explicit Forwarding
TACS '01 Proceedings of the 4th International Symposium on Theoretical Aspects of Computer Software
DBMSs on a Modern Processor: Where Does Time Go?
VLDB '99 Proceedings of the 25th International Conference on Very Large Data Bases
Weaving Relations for Cache Performance
Proceedings of the 27th International Conference on Very Large Data Bases
A Blocked All-Pairs Shortest-Path Algorithm
SWAT '00 Proceedings of the 7th Scandinavian Workshop on Algorithm Theory
Cost-Effective Compiler Directed Memory Prefetching and Bypassing
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Formal Verification of Descriptions with Distinct Order of Memory Operations
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Data Cube Compression with QuantiCubes
DaWaK 2000 Proceedings of the Second International Conference on Data Warehousing and Knowledge Discovery
Accessing Multiple Sequences Through Set Associative Caches
ICAL '99 Proceedings of the 26th International Colloquium on Automata, Languages and Programming
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Verification of Data-Insensitive CIrcuits: An In-Order-Retirement Case Study
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Sequential Equivalence Checking by Symbolic Simulation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
A Characterization of Temporal Locality and Its Portability across Memory Hierarchies
ICALP '01 Proceedings of the 28th International Colloquium on Automata, Languages and Programming,
Cache Oblivious Distribution Sweeping
ICALP '02 Proceedings of the 29th International Colloquium on Automata, Languages and Programming
Server-Based Dynamic Server Selection Algorithms
ICOIN '02 Revised Papers from the International Conference on Information Networking, Wireless Communications Technologies and Network Applications-Part II
On the Design and Evaluation of Job Scheduling Algorithms
IPPS/SPDP '99/JSSPP '99 Proceedings of the Job Scheduling Strategies for Parallel Processing
Minerva: An Adaptive Subblock Coherence Protocol for Improved SMP Performance
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
A Comparison of Two Verification Methods for Speculative Instruction Execution
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Automatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note)
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Performance of the Complex Streamed Instruction Set on Image Processing Kernels
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Performance Scalability of Multimedia Instruction Set Extensions
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Multi-stage Cascaded Prediction
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Formal Verification of Explicitly Parallel Microprocessors
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Abstract BDDs: A Technque for Using Abstraction in Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Exploiting Transition Locality in Automatic Verification
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal Verification of the VAMP Floating Point Unit
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Adaptive Algorithms for Cache-Efficient Trie Search
ALENEX '99 Selected papers from the International Workshop on Algorithm Engineering and Experimentation
Fast Priority Queues for Cached Memory
ALENEX '99 Selected papers from the International Workshop on Algorithm Engineering and Experimentation
Processor Pipelines and Their Properties for Static WCET Analysis
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
TABLEAUX '99 Proceedings of the International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
Register File Energy Reduction by Operand Data Reuse
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture
Revised Papers from the NETWORKING 2002 Workshops on Web Engineering and Peer-to-Peer Computing
Using SDL in a Stateless Environment
SDL '01 Proceedings of the 10th International SDL Forum Copenhagen on Meeting UML
Performance Engineering Case Study: Heap Construction
WAE '99 Proceedings of the 3rd International Workshop on Algorithm Engineering
Analysing Cache Effects in Distribution Sorting
WAE '99 Proceedings of the 3rd International Workshop on Algorithm Engineering
Experiments with List Ranking for Explicit Multi-Threaded (XMT) Instruction Parallelism
WAE '99 Proceedings of the 3rd International Workshop on Algorithm Engineering
An Experimental Evaluation of Hybrid Data Structures for Searching
WAE '99 Proceedings of the 3rd International Workshop on Algorithm Engineering
Efficient Sorting Using Registers and Caches
WAE '00 Proceedings of the 4th International Workshop on Algorithm Engineering
Interchanging Two Segments of an Array in a Hierarchical Memory System
WAE '00 Proceedings of the 4th International Workshop on Algorithm Engineering
Optimised Predecessor Data Structures for Internal Memory
WAE '01 Proceedings of the 5th International Workshop on Algorithm Engineering
Reducing Cache Conflicts by a Parametrized Memory Mapping
ParNum '99 Proceedings of the 4th International ACPC Conference Including Special Tracks on Parallel Numerics and Parallel Computing in Image Processing, Video Processing, and Multimedia: Parallel Computation
A Watchdog Processor Architecture with Minimal Performance Overhead
SAFECOMP '02 Proceedings of the 21st International Conference on Computer Safety, Reliability and Security
Performance Evaluation of Complex Systems: Techniques and Tools, Performance 2002, Tutorial Lectures
Fast Optimal Instruction Scheduling for Single-Issue Processors with Arbitrary Latencies
CP '01 Proceedings of the 7th International Conference on Principles and Practice of Constraint Programming
Techniques for Effectively Exploiting a Zero Overhead Loop Buffer
CC '00 Proceedings of the 9th International Conference on Compiler Construction
CAPPLES - A Capacity Planning and Performance Analysis Method for the Migration of Legacy Systems
ER '99 Proceedings of the Workshops on Evolution and Change in Data Management, Reverse Engineering in Information Systems, and the World Wide Web and Conceptual Modeling
Verifying Sequential Consistency on Shared-Memory Multiprocessor Systems
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Validation of Pipelined Processor Designs Using Esterel Tools: A Case Study
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Scalability of a Workstation Cluster Architecture for Video-on-Demand Applications
TOOLS '00 Proceedings of the 11th International Conference on Computer Performance Evaluation: Modelling Techniques and Tools
A Fault Tolerant Approach to Microprocessor Design
DSN '01 Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS)
Formal Verification of a Reconfigurable Microprocessor
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Fly - A Modifiable Hardware Compiler
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Analysing the Cache Behaviour of Non-uniform Distribution Sorting Algorithms
ESA '00 Proceedings of the 8th Annual European Symposium on Algorithms
A Reconfigurable Processor Architecture
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Improving Cache Effectiveness through Array Data Layout Manipulation in SAC
IFL '00 Selected Papers from the 12th International Workshop on Implementation of Functional Languages
An Autonomous Data Coherency Protocol for Mobile Devices
MDA '99 Proceedings of the First International Conference on Mobile Data Access
Verifying a Simple Pipelined Microprocessor Using Maude
WADT '01 Selected papers from the 15th International Workshop on Recent Trends in Algebraic Development Techniques
Practical parallel computing
Compiler optimization on VLIW instruction scheduling for low power
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Branch prediction techniques for low-power VLIW processors
Proceedings of the 13th ACM Great Lakes symposium on VLSI
A methodology to design programmble embedded systems: the Y-chart approach
Embedded processor design challenges
System administrators are users, too: designing workspaces for managing internet-scale systems
CHI '03 Extended Abstracts on Human Factors in Computing Systems
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework
IEEE Transactions on Parallel and Distributed Systems
Improving cache hit ratio by extended referencing cache lines
Journal of Computing Sciences in Colleges
Journal of Symbolic Computation
DMMX: dynamic memory management extensions
Journal of Systems and Software
End-to-end WAN service availability
IEEE/ACM Transactions on Networking (TON)
Hardware courses and the undergraduate computer science curriculum at small colleges
Journal of Computing Sciences in Colleges
Configurable parallel memory architecture for multimedia computers
Journal of Systems Architecture: the EUROMICRO Journal
Fast processor core selection for WLAN modem using mappability estimation
Proceedings of the tenth international symposium on Hardware/software codesign
Energy frugal tags in reprogrammable I-caches for application-specific embedded processors
Proceedings of the tenth international symposium on Hardware/software codesign
Efficient URL caching for world wide web crawling
WWW '03 Proceedings of the 12th international conference on World Wide Web
Uses and abuses of Amdahl's law
Journal of Computing Sciences in Colleges
Instruction encoding synthesis for architecture exploration using hierarchical processor models
Proceedings of the 40th annual Design Automation Conference
Accurate timing analysis by modeling caches, speculation and their interaction
Proceedings of the 40th annual Design Automation Conference
Retargetable and reconfigurable software dynamic translation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Code optimization for code compression
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Advanced copy propagation for arrays
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Effect of node size on the performance of cache-conscious B+-trees
SIGMETRICS '03 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
A comparison of empirical and model-driven optimization
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Journal of Systems and Software
Inplace run-length 2d compressed search
Theoretical Computer Science
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Adaptive Pipeline Structures fo Speculation Control
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Architectural Considerations for Application-Specific Counterflow Pipelines
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Fast Controllers for Data Dominated Applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Register Synthesis for Speculative Computation
EDTC '97 Proceedings of the 1997 European conference on Design and Test
CPR: A Configuration Profiling Tool
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Reconfigurable Platform for Academic Purposes
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
FOCS '99 Proceedings of the 40th Annual Symposium on Foundations of Computer Science
Identifying Candidate Disease Genes with High-Performance Computing
The Journal of Supercomputing
Memory Hierarchy Design for Jetpipeline: To Execute Scalar and Vector Instructions in Parallel
PAS '97 Proceedings of the 2nd AIZU International Symposium on Parallel Algorithms / Architecture Synthesis
Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Real time aspects of cluster based caches
RTCSA '95 Proceedings of the 2nd International Workshop on Real-Time Computing Systems and Applications
Performance Modeling Using Object-Oriented Execution-Driven Simulation}
SS '96 Proceedings of the 29th Annual Simulation Symposium (SS '96)
An Architectural Level Energy Reduction Technique For Deep-Submicron Cache Memories
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Interface Design Techniques for Single-Chip Systems
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
3.3 Performance Test Case Generation for Microprocessors
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Instruction Randomization Self Test For Processor Cores
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
PADded Cache: A New Fault-Tolerance Technique for Cache Memories
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Copy Emulation in Checksummed, Multiple-Packet Communication
INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
SCAN SYNTHESIS FOR ONE-HOT SIGNALS
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Architectural Support for Dynamic Memory Management
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Analysis of Shared Memory Misses and Reference Patterns
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Effective Hardware-Based Two-Way Loop Cache for High Performance Low Power Processors
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A Multi-Level Memory System Architecture for High-Performance DSP Applications
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A Trace Based Evaluation of Speculative Branch Decoupling
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Xtensa with User Defined DSP Coprocessor Microarchitectures
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Instruction Prediction for Step Power Reduction
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
A brief history of just-in-time
ACM Computing Surveys (CSUR)
Visualizing Application Behavior on Superscalar Processors
INFOVIS '99 Proceedings of the 1999 IEEE Symposium on Information Visualization
Size-Constrained Code Placement for Cache Miss Rate Reduction
ISSS '96 Proceedings of the 9th international symposium on System synthesis
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Proceedings of the 12th international symposium on System synthesis
A highly configurable cache architecture for embedded systems
Proceedings of the 30th annual international symposium on Computer architecture
Proceedings of the 30th annual international symposium on Computer architecture
A case study of a system-level approach to power-aware computing
ACM Transactions on Embedded Computing Systems (TECS)
Dynamic schemes for speculative execution of code
Performance Evaluation
Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving
Proceedings of the 2003 international symposium on Low power electronics and design
Checkpointing alternatives for high performance, power-aware processors
Proceedings of the 2003 international symposium on Low power electronics and design
Code Transformations for Low Power Caching in Embedded Multimedia Processors
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
A Quantitative Code Analysis of Scientific Systolic Programs: DSP vs. Matrix Algorithms
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
DSP architectures: past, present and futures
ACM SIGARCH Computer Architecture News
RSP '01 Proceedings of the 12th International Workshop on Rapid System Prototyping
Power-efficient flexible processor architecture for embedded applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Efficient sorting using registers and caches
Journal of Experimental Algorithmics (JEA)
A low-cost memory architecture with NAND XIP for mobile embedded systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
On the elusive benefits of protocol offload
NICELI '03 Proceedings of the ACM SIGCOMM workshop on Network-I/O convergence: experience, lessons, implications
Caching and Scheduling for Broadcast Disk Systems
Journal of Experimental Algorithmics (JEA)
Adapting Radix Sort to the Memory Hierarchy
Journal of Experimental Algorithmics (JEA)
Programming skills for a changing world: back to the basics
Journal of Computing Sciences in Colleges
Code size reduction technique and implementation for software-pipelined DSP applications
ACM Transactions on Embedded Computing Systems (TECS)
Automatic test program generation for pipelined processors
Proceedings of the 2003 ACM symposium on Applied computing
Universal Mechanisms for Data-Parallel Architectures
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Hardware Support for Priority Inheritance
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Design and analysis of low-power cache using two-level filter scheme
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-leakage asymmetric-cell SRAM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
RTGEN: an algorithm for automatic generation of reservation tables from architectural descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Adaptive low-power address encoding techniques using self-organizing lists
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Combinatorial power in multimedia processors
ACM SIGARCH Computer Architecture News
Parallel, multigrain iterative solvers for hiding network latencies on MPPs and networks of clusters
Parallel Computing - Parallel matrix algorithms and applications (PMAA '02)
Execution History Guided Instruction Prefetching
The Journal of Supercomputing
A Quantitative Analysis of Tile Size Selection Algorithms
The Journal of Supercomputing
A BNF-based automatic test program generator for compatible microprocessor verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Single Assignment C: efficient support for high-level array operations in a functional setting
Journal of Functional Programming
Hardware for multiconnected networks: the design flow
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Informatics and computer science intelligent systems applications
Implementation of a streaming execution unit
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
DSPxPlore: design space exploration methodology for an embedded DSP core
Proceedings of the 2004 ACM symposium on Applied computing
An energy efficient cache memory architecture for embedded systems
Proceedings of the 2004 ACM symposium on Applied computing
Application-specific instruction generation for configurable processor architectures
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Platform Based on Open-Source Cores for Industrial Applications
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Automatic ARIMA Time Series Modeling for Adaptive I/O Prefetching
IEEE Transactions on Parallel and Distributed Systems
Validated observation and reporting of microscopic performance using Pentium II counter facilities
WOSP '04 Proceedings of the 4th international workshop on Software and performance
Repairing return address stack for buffer overflow protection
Proceedings of the 1st conference on Computing frontiers
Reconfigurable platforms for ubiquitous computing
Proceedings of the 1st conference on Computing frontiers
Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior
IEEE Transactions on Computers
Verification of the Futurebus+ cache coherence protocol: a case study in model checking
ACSC '04 Proceedings of the 27th Australasian conference on Computer science - Volume 26
Queue - DSPs
Modeling and evaluating the security threats of transient errors in firewall software
Performance Evaluation - Dependable systems and networks-performance and dependability symposium (DSN-PDS) 2002: Selected papers
A virtual machine environment for teaching the development of system software
ACM-SE 42 Proceedings of the 42nd annual Southeast regional conference
Balanced scheduling: instruction scheduling when memory latency is uncertain
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Code Generation for Functional Validation of Pipelined Microprocessors
Journal of Electronic Testing: Theory and Applications
Main Memory Indexing: The Case for BD-Tree
IEEE Transactions on Knowledge and Data Engineering
Enhancing data cache reliability by the addition of a small fully-associative replication cache
Proceedings of the 18th annual international conference on Supercomputing
CAS-DSM: a compiler assisted software distributed shared memory
International Journal of Parallel Programming
Characteristics of I/O traffic in personal computer and server workloads
IBM Systems Journal
Evolvable computing by means of evolvable components
Natural Computing: an international journal
Dynamic overlay of scratchpad memory for energy minimization
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A novel deadlock avoidance algorithm and its hardware implementation
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Characteristics of production database workloads and the TPC benchmarks
IBM Systems Journal - End-to-end security
Proceedings of the 4th ACM international conference on Embedded software
Improving Data Locality by Array Contraction
IEEE Transactions on Computers
Profile-Driven Selective Code Compression
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address Buses
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fully Automatic Test Program Generation for Microprocessor Cores
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Dynamic Functional Unit Assignment for Low Power
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Multithreaded Synchronous Data Flow Simulation
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Micro-Network for SoC: Implementation of a 32-Port SPIN network
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Network Processing Challenges and an Experimental NPU Platform
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
General loop fusion technique for nested loops considering timing and code size
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
IC Cost Reduction by Applying Embedded Fault Tolerance for Soft Errors
Journal of Electronic Testing: Theory and Applications
Data cache management on EPIC architecture: optimizing memory access for image processing
MEDEA '03 Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture
Optimizing Graph Algorithms for Improved Cache Performance
IEEE Transactions on Parallel and Distributed Systems
Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Zero-aware asymmetric SRAM cell for reducing cache power in writing zero
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Two-Zone Hybrid Routing Protocol for Mobile Ad Hoc Networks
IEEE Transactions on Parallel and Distributed Systems
Automatic tiling of iterative stencil loops
ACM Transactions on Programming Languages and Systems (TOPLAS)
Modeling control speculation for timing analysis
Real-Time Systems
IEEE Transactions on Knowledge and Data Engineering
War of the benchmark means: time for a truce
ACM SIGARCH Computer Architecture News
A clocking technique for FPGA pipelined designs
Journal of Systems Architecture: the EUROMICRO Journal
Fast SVM Training Algorithm with Decomposition on Very Large Data Sets
IEEE Transactions on Pattern Analysis and Machine Intelligence
Optimizing Sorting with Genetic Algorithms
Proceedings of the international symposium on Code generation and optimization
Symmetric Multiprocessing on Programmable Chips Made Easy
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Realistic Modeling and Svnthesis of Resources for Computational Grids
Proceedings of the 2004 ACM/IEEE conference on Supercomputing
Identifying and Exploiting Spatial Regularity in Data Memory References
Proceedings of the 2003 ACM/IEEE conference on Supercomputing
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System
Journal of VLSI Signal Processing Systems
Hierarchical Binary Set Partitioning in Cache Memories
The Journal of Supercomputing
The diffusion space of data diffusion architectures
Parallel Computing
ECEM: an event correlation based event manager for an I/O-intensive application
Journal of Systems and Software
Impact of Page Size on Communication Performance
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9 - Volume 10
A study of performance impact of memory controller features in multi-processor server environment
WMPI '04 Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture
An in-depth look at computer performance growth
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
HERMES: an infrastructure for low area overhead packet-switching networks on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
A Portable Programming Interface for Performance Evaluation on Modern Processors
International Journal of High Performance Computing Applications
Total leakage optimization strategies for multi-level caches
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Accelerated warmup for sampled microarchitecture simulation
ACM Transactions on Architecture and Code Optimization (TACO)
Sparse matrix storage revisited
Proceedings of the 2nd conference on Computing frontiers
Improving branch prediction accuracy with parallel conservative correctors
Proceedings of the 2nd conference on Computing frontiers
Branch elimination by condition merging
Software—Practice & Experience
A process-tolerant cache architecture for improved yield in nanoscale technologies
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Frequency-based code placement for embedded multiprocessors
Proceedings of the 42nd annual Design Automation Conference
A highly configurable cache for low energy embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
An Efficient Picture-Rate Up-Converter
Journal of VLSI Signal Processing Systems
Towards a framework for source code instrumentation measurement validation
Proceedings of the 5th international workshop on Software and performance
Encyclopedia of Computer Science
Encyclopedia of Computer Science
Microprocessors and microcomputers
Encyclopedia of Computer Science
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Reduced instruction set computer (RISC)
Encyclopedia of Computer Science
A methodology for detailed performance modeling of reduction computations on SMP machines
Performance Evaluation - Performance modelling and evaluation of high-performance parallel and distributed systems
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An o(min(m, n)) parallel deadlock detection algorithm
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Sparsity: Optimization Framework for Sparse Matrix Kernels
International Journal of High Performance Computing Applications
Proceedings of the 10th international workshop on Formal methods for industrial critical systems
Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring
IEEE Transactions on Computers
IEEE Transactions on Mobile Computing
Formal Verification of the VAMP Floating Point Unit
Formal Methods in System Design
Memory allocation for embedded systems with a compile-time-unknown scratch-pad size
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Optimizing Probe-Based Storage
FAST '03 Proceedings of the 2nd USENIX Conference on File and Storage Technologies
Hardware Support for Bulk Data Movement in Server Platforms
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Dealing with I/O Devices in the Context of Pervasive System Verification
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Towards the Formal Verification of Lower System Layers in Automotive Systems
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Replication Cache: A Small Fully Associative Cache to Improve Data Cache Reliability
IEEE Transactions on Computers
Application Resource Requirement Estimation in a Parallel-Pipeline Model of Execution
IEEE Transactions on Parallel and Distributed Systems
MicroGP—An Evolutionary Assembly Program Generator
Genetic Programming and Evolvable Machines
Bridging the Processor-Memory Performance Gapwith 3D IC Technology
IEEE Design & Test
Survey and taxonomy of packet classification techniques
ACM Computing Surveys (CSUR)
Towards the Formal Verification of a C0 Compiler: Code Generation and Implementation Correctnes
SEFM '05 Proceedings of the Third IEEE International Conference on Software Engineering and Formal Methods
A power aware system level interconnect design methodology for latency-insensitive systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
The automatic improvement of locality in storage systems
ACM Transactions on Computer Systems (TOCS)
Computer science education in the 21st century
Communications of the ACM - Self managed systems
Cache size selection for performance, energy and reliability of time-constrained systems
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
International Journal of Parallel Programming
BEAM: bus encoding based on instruction-set-aware memories
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Branch predictor design and performance estimation for a high performance embedded microprocessor
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
MAPLE chip: a processing element for a static scheduling centric multiprocessor
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Automatic functional test program generation for microprocessor verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
TERPS: the embedded reliable processing system
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A novel O(n) parallel banker's algorithm for System-on-a-Chip
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Compiler transformations for effectively exploiting a zero overhead loop buffer
Software—Practice & Experience
A time invariant working set model for independent reference
ACM-SE 33 Proceedings of the 33rd annual on Southeast regional conference
IEEE Transactions on Computers
Computer Memory and Arithmetic: A Look under the Hood
Computing in Science and Engineering
Design and implementation of a modular and portable IEEE 754 compliant floating-point unit
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Reducing the cost of conditional transfers of control by using comparison specifications
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Performance Models for Network Processor Design
IEEE Transactions on Parallel and Distributed Systems
A low energy cache design for multimedia applications exploiting set access locality
Journal of Systems Architecture: the EUROMICRO Journal
Automated WCET analysis based on program modes
Proceedings of the 2006 international workshop on Automation of software test
MMR: A MultiMedia Router architecture to support hybrid workloads
Journal of Parallel and Distributed Computing
The algorithm of pipelined gossiping
Journal of Systems Architecture: the EUROMICRO Journal
The hardness of cache conscious data placement
Nordic Journal of Computing
PEMPIs: a new methodology of modeling and prediction of MPI programs performance
International Journal of Parallel Programming
Flooding and recycling authorizations
NSPW '05 Proceedings of the 2005 workshop on New security paradigms
Modeling out-of-order processors for WCET analysis
Real-Time Systems
Software Demand, Hardware Supply
IEEE Micro
Integer Multipliers with Overflow Detection
IEEE Transactions on Computers
A Simple High-Speed Multiplier Design
IEEE Transactions on Computers
Computation hierarchy for in-network processing
Mobile Networks and Applications
Performance tradeoffs in read-optimized databases
VLDB '06 Proceedings of the 32nd international conference on Very large data bases
Improving instruction cache performance in OLTP
ACM Transactions on Database Systems (TODS)
Investigating cache energy and latency break-even points in high performance processors
MEDEA '06 Proceedings of the 2006 workshop on MEmory performance: DEaling with Applications, systems and architectures
Decomposition of instruction decoders for low-power designs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficient techniques for automatic verification-oriented test set optimization
International Journal of Parallel Programming
Cache-oblivious nested-loop joins
CIKM '06 Proceedings of the 15th ACM international conference on Information and knowledge management
Entropy-based bounds for online algorithms
ACM Transactions on Algorithms (TALG)
A Novel {O(n)} Parallel Banker's Algorithm for System-on-a-Chip
IEEE Transactions on Parallel and Distributed Systems
Dynamic reuse of subroutine results
Journal of Systems Architecture: the EUROMICRO Journal
Generation of fast interpreters for Huffman compressed bytecode
Science of Computer Programming - Special issue on advances in interpreters, virtual machines and emulators (IVME'03)
Physical Database Design: the database professional's guide to exploiting indexes, views, storage, and more
Timing analysis for preemptive multitasking real-time systems with caches
ACM Transactions on Embedded Computing Systems (TECS)
Cache-Friendly implementations of transitive closure
Journal of Experimental Algorithmics (JEA)
Reducing stack usage in Java bytecode execution
ACM SIGARCH Computer Architecture News
A TCAM-based distributed parallel IP lookup scheme and performance analysis
IEEE/ACM Transactions on Networking (TON)
JET: dynamic join-exit-tree amortization and scheduling for contributory key management
IEEE/ACM Transactions on Networking (TON)
An area-efficient bit-serial integer and GF(2n) multiplier
Microelectronic Engineering
Hardware/software optimization for array & pointer boundary checking against buffer overflow attacks
Journal of Parallel and Distributed Computing - Special issue: Security in grid and distributed systems
Improving power efficiency with compiler-assisted cache replacement
Journal of Embedded Computing - Cache exploitation in embedded systems
A cache design for high performance embedded systems
Journal of Embedded Computing - Cache exploitation in embedded systems
The rise and fall of High Performance Fortran: an historical object lesson
Proceedings of the third ACM SIGPLAN conference on History of programming languages
Impulse: Memory system support for scientific applications
Scientific Programming
Development of a customized processor architecture for accelerating genetic algorithms
Microprocessors & Microsystems
Evaluation of interval-based dynamic voltage scaling algorithms on mobile Linux system
Proceedings of the 2007 ACM symposium on Applied computing
ParallAX: an architecture for real-time physics
Proceedings of the 34th annual international symposium on Computer architecture
Operating system management of MEMS-based storage devices
OSDI'00 Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
End-to-end WAN service availability
USITS'01 Proceedings of the 3rd conference on USENIX Symposium on Internet Technologies and Systems - Volume 3
Hardware Support for Accelerating Data Movement in Server Platform
IEEE Transactions on Computers
Adaptive Index Utilization in Memory-Resident Structural Joins
IEEE Transactions on Knowledge and Data Engineering
Electronic Notes in Theoretical Computer Science (ENTCS)
Proceedings of the conference on Design, automation and test in Europe
Improving web server performance by caching dynamic data
USITS'97 Proceedings of the USENIX Symposium on Internet Technologies and Systems on USENIX Symposium on Internet Technologies and Systems
lmbench: portable tools for performance analysis
ATEC '96 Proceedings of the 1996 annual conference on USENIX Annual Technical Conference
Linux Kernel hash table behavior: analysis and improvements
ALS'00 Proceedings of the 4th annual Linux Showcase & Conference - Volume 4
Reducing the disk I/O of web proxy server caches
ATEC '99 Proceedings of the annual conference on USENIX Annual Technical Conference
Proceedings of the 21st annual international conference on Supercomputing
Computer architecture education at the University of Illinois: current status and some thoughts
WCAE-2 '96 Proceedings of the 1996 workshop on Computer architecture education
Using FPGA for computer architecture/organization education
WCAE-2 '96 Proceedings of the 1996 workshop on Computer architecture education
An interactive, visual simulator for the DLX pipeline
WCAE-3 '97 Proceedings of the 1997 workshop on Computer architecture education
Evaluating the performance of dynamic branch prediction schemes with BPSim
WCAE-3 '97 Proceedings of the 1997 workshop on Computer architecture education
A rudimentary machine: experiences in the design of a pedagogic computer
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
A lab course on computer architecture
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
A holistic approach to computer system design education based on system simulation techniques
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
A hierarchical memory system environment
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
Learning the relationship between computer architecture and technology by reconfiguring
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
CALKAS: a computer architecture learning and knowledge assessment system
WCAE-5 '99 Proceedings of the 1999 workshop on Computer architecture education
Computer architecture development courses in Toulouse Universities
WCAE-5 '99 Proceedings of the 1999 workshop on Computer architecture education
CPU design kit: an instructional prototyping platform for teaching processor design
WCAE '95 Proceedings of the 1995 workshop on Computer architecture education
Combining object-oriented design and computer architecture into a single senior-level course
WCAE '95 Proceedings of the 1995 workshop on Computer architecture education
Experiences integrating research tools and projects into computer architecture courses
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
SATSim: a superscalar architecture trace simulator using interactive animation
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
Teaching processor architecture with a VLSI perspective
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
On the design of a new CPU architecture for pedagogical purposes
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
Effective support of simulation in computer architecture instruction
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
ILP in the undergraduate curriculum
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
A survey of web resources for teaching computer architecture
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
The liberty simulation environment as a pedagogical tool
WCAE '03 Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer Architecture
Multimedia components for the visualization of dynamic behavior in computer architectures
WCAE '03 Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer Architecture
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
Teaching basics of instruction pipelining with HDLDLX
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
Visual simulator for ILP dynamic OOO processor
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
A simulation applet for microcoding exercises
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
VLIW-DLX simulator for educational purposes
WCAE '07 Proceedings of the 2007 workshop on Computer architecture education
Understanding cache hierarchy interactions with a program-driven simulator
WCAE '07 Proceedings of the 2007 workshop on Computer architecture education
An integrated approach to teaching computer systems architecture
WCAE '07 Proceedings of the 2007 workshop on Computer architecture education
Using Transport Triggered Architectures for Embedded Processor Design
Integrated Computer-Aided Engineering
Energy-efficient and performance-enhanced disks using flash-memory cache
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
A Study of Architectural Optimization Methods in Bioinformatics Applications
International Journal of High Performance Computing Applications
EURASIP Journal on Applied Signal Processing
Scratch-pad memory allocation without compiler support for java applications
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Scalable Dynamic Instruction Scheduler through Wake-Up Spatial Locality
IEEE Transactions on Computers
Steps towards cache-resident transaction processing
VLDB '04 Proceedings of the Thirtieth international conference on Very large data bases - Volume 30
Architectural support for run-time validation of program data properties
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Data cache locking for tight timing calculations
ACM Transactions on Embedded Computing Systems (TECS)
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Investigating cache energy and latency break-even points in high performance processors
ACM SIGARCH Computer Architecture News
Adaptive set pinning: managing shared caches in chip multiprocessors
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
International Journal of High Performance Computing and Networking
Towards Ultra-High Resolution Models of Climate and Weather
International Journal of High Performance Computing Applications
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
A dynamically reconfigurable cache for multithreaded processors
Journal of Embedded Computing - Issues in embedded single-chip multicore architectures
Analyzing memory access intensity in parallel programs on multicore
Proceedings of the 22nd annual international conference on Supercomputing
Integer squarers with overflow detection
Computers and Electrical Engineering
Automatic architecture refinement techniques for customizing processing elements
Proceedings of the 45th annual Design Automation Conference
N-variant IC design: methodology and applications
Proceedings of the 45th annual Design Automation Conference
Designing packet buffers for router linecards
IEEE/ACM Transactions on Networking (TON)
Enhanced-functionality multipliers
Journal of Systems Architecture: the EUROMICRO Journal
Deflating the big bang: fast and scalable deep packet inspection with extended finite automata
Proceedings of the ACM SIGCOMM 2008 conference on Data communication
Testing diagnostics of modern microprocessors with the use of functional models
Automation and Remote Control
Teachning network storage technology: assessment outcomes and directions
SIGITE '08 Proceedings of the 9th ACM SIGITE conference on Information technology education
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
A New Type of Embedded File System Based on SPM
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Active control and digital rights management of integrated circuit IP cores
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
DRAM is plenty fast for wirespeed statistics counting
ACM SIGMETRICS Performance Evaluation Review
Real-time synchronization on distributed architecture with Ada-2005
Proceedings of the 2008 ACM annual international conference on SIGAda annual international conference
Thrifty BTB: A comprehensive solution for dynamic power reduction in branch target buffers
Microprocessors & Microsystems
A unified model for multicore architectures
IFMT '08 Proceedings of the 1st international forum on Next-generation multicore/manycore technologies
Exploiting an abstract-machine-based framework in the design of a Java ILP processor
Journal of Systems Architecture: the EUROMICRO Journal
Reveal: A Formal Verification Tool for Verilog Designs
LPAR '08 Proceedings of the 15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
Performance optimization of SOA based AJAX application
Proceedings of the 2nd India software engineering conference
Memory allocation for embedded systems with a compile-time-unknown scratch-pad size
ACM Transactions on Embedded Computing Systems (TECS)
Partial order method for timed simulation of system-level MPSoC designs
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Novel task migration framework on configurable heterogeneous MPSoC platforms
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Design and implementation of a queue compiler
Microprocessors & Microsystems
Design for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors
IEICE - Transactions on Information and Systems
Larc: a little architecture for the classroom
Journal of Computing Sciences in Colleges
Enhancing bug hunting using high-level symbolic simulation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Journal of Computer Science and Technology
Journal of Automated Reasoning
MediaBench II video: Expediting the next generation of video systems research
Microprocessors & Microsystems
Instruction-based self-testing of delay faults in pipelined processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Massively Parallel Architecture for Bioinformatics
ICCS '09 Proceedings of the 9th International Conference on Computational Science: Part I
Software Profiling for Deterministic Replay Debugging of User Code
Proceedings of the 2006 conference on New Trends in Software Methodologies, Tools and Techniques: Proceedings of the fifth SoMeT_06
Journal of Signal Processing Systems
Journal of Signal Processing Systems
What the parallel-processing community has (failed) to offer the multi/many-core generation
Journal of Parallel and Distributed Computing
Tools used in a distributed learning environment university
EE'08 Proceedings of the 5th WSEAS/IASME international conference on Engineering education
Tetris-XL: A performance-driven spill reduction technique for embedded VLIW processors
ACM Transactions on Architecture and Code Optimization (TACO)
Efficient Data Access Management for FPGA-Based Image Processing SoCs
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Journal of Systems Architecture: the EUROMICRO Journal
Dataflow models for shared memory access latency analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Proceedings of the 46th Annual Design Automation Conference
A CNN-specific integrated processor
EURASIP Journal on Advances in Signal Processing - CNN technology for spatiotemporal signal processing
Scalable register bypassing for FPGA-based processors
Microprocessors & Microsystems
Adaptive scratch pad memory management for dynamic behavior of multimedia applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Experience with building a commodity intel-based ccNUMA system
IBM Journal of Research and Development
ACM Transactions on Embedded Computing Systems (TECS)
Efficient shared-memory support for parallel graph reduction
Future Generation Computer Systems
A NUMA architecture for parallel structures
MIC '07 Proceedings of the 26th IASTED International Conference on Modelling, Identification, and Control
A hardware filesystem implementation with multidisk support
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Dynamic cluster resource allocations for jobs with known memory demands
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
Algorithms for memory hierarchies: advanced lectures
Algorithms for memory hierarchies: advanced lectures
Parallel Computing
SHA: a design for parallel architectures?
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
An enhanced framework for microprocessor test-program generation
EuroGP'03 Proceedings of the 6th European conference on Genetic programming
Optimized register renaming scheme for stack-based x86 operations
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Effective inline-threaded interpretation of Java bytecode using preparation sequences
CC'03 Proceedings of the 12th international conference on Compiler construction
Toward memory-efficient linear solvers
VECPAR'02 Proceedings of the 5th international conference on High performance computing for computational science
Locality enhancement by array contraction
LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
On the architecture of system verification environments
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
Realistic worst-case execution time analysis in the context of pervasive system verification
Program analysis and compilation, theory and practice
Dynamic branch prediction and control speculation
International Journal of High Performance Systems Architecture
Area-efficient floorplans and interconnects for homogeneous multi-core architectures
International Journal of High Performance Systems Architecture
Single- and multi-core configurable AES architectures for flexible security
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Robotics and Autonomous Systems
Optimization of a Computational Fluid Dynamics Code for the Memory Hierarchy: A Case Study
International Journal of High Performance Computing Applications
Proceedings of the Conference on Design, Automation and Test in Europe
Adaptive prefetching for shared cache based chip multiprocessors
Proceedings of the Conference on Design, Automation and Test in Europe
Design and performance analysis of a DRAM-based statistics counter array architecture
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Algorithms and theory of computation handbook
IWOMP'05/IWOMP'06 Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming
Multi-view memory to support OS locking for transaction systems
IDEAS'97 Proceedings of the 1997 international conference on International database engineering and applications symposium
Self-similarity in SPLASH-2 workloads on shared memory multiprocessors systems
EURO-PDP'00 Proceedings of the 8th Euromicro conference on Parallel and distributed processing
Improving resource-unaware SAT solvers
LPAR'10 Proceedings of the 17th international conference on Logic for programming, artificial intelligence, and reasoning
Register Cache System Not for Latency Reduction Purpose
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Control for power gating of wires
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Facilitating unreachable code diagnosis and debugging
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Quantifying academic placer performance on custom designs
Proceedings of the 2011 international symposium on Physical design
Wake-up logic optimizations through selective match and wakeup range limitation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Overlay techniques for scratchpad memories in low power embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power-delay product minimization in high-performance 64-bit carry-select adders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
psort, yet another fast stable sorting software
Journal of Experimental Algorithmics (JEA)
Optimizing probe-based storage
FAST'03 Proceedings of the 2nd USENIX conference on File and storage technologies
A RISC architecture for 2DLNS-based signal processing
International Journal of High Performance Systems Architecture
Controlling cache utilization of HPC applications
Proceedings of the international conference on Supercomputing
ACAI '11 Proceedings of the International Conference on Advances in Computing and Artificial Intelligence
ACM Transactions on Algorithms (TALG)
Applying the UML class diagram in the performance analysis
EPEW'06 Proceedings of the Third European conference on Formal Methods and Stochastic Models for Performance Evaluation
RRBS: a fault tolerance model for cluster/grid parallel file system
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
Exploiting hub states in automatic verification
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Memory access schedule minimization for embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
Control flow error checking with ISIS
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
FAST: an efficient flash translation layer for flash memory
EUC'06 Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing
On the complexity of min-max sorting networks
Information Sciences: an International Journal
Code generation for STA architecture
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Overview of metaheuristics methods in compilation
MICAI'05 Proceedings of the 4th Mexican international conference on Advances in Artificial Intelligence
On the correctness of operating system kernels
TPHOLs'05 Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics
Tradeoffs between branch mispredictions and comparisons for sorting algorithms
WADS'05 Proceedings of the 9th international conference on Algorithms and Data Structures
System description: Combination of Isabelle/HOL with automatic tools
FroCoS'05 Proceedings of the 5th international conference on Frontiers of Combining Systems
Data hiding in compiled program binaries for enhancing computer system performance
IH'05 Proceedings of the 7th international conference on Information Hiding
Automatic completion and refinement of verification sets for microprocessor cores
EC'05 Proceedings of the 3rd European conference on Applications of Evolutionary Computing
An architectural framework for detecting process hangs/crashes
EDCC'05 Proceedings of the 5th European conference on Dependable Computing
Exploration of 3D grid caching strategies for ray-shooting
Journal of Real-Time Image Processing
A memory bandwidth effective cache store miss policy
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Preventing denial-of-service attacks in shared CMP caches
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Remote store programming: a memory model for embedded multicore
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
An Architecture for High Availability Multi-user Systems
Computer Communications
Fifty years of research in artificial intelligence
Annual Review of Information Science and Technology
DRAM-based statistics counter array architecture with performance guarantee
IEEE/ACM Transactions on Networking (TON)
Sensitivity of cache replacement policies
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Emumaker86: a hardware simulator for teaching CPU design
Proceeding of the 44th ACM technical symposium on Computer science education
On GPU based fitness evaluation with decoupled training partition cardinality
EvoApplications'13 Proceedings of the 16th European conference on Applications of Evolutionary Computation
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