The PowerPC performance modeling methodology
Communications of the ACM
A modular approach to Motorola PowerPC compilers
Communications of the ACM
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Dhrystone: a synthetic systems programming benchmark
Communications of the ACM
Hi-index | 0.00 |
Published and projected benchmark numbers do not necessarily help predict the behavior of a user application on a particular microprocessor system. The real test comes when a user application is executed and timed on the microprocessor[5], which usually stresses the system in a different fashion than most benchmarks do. Unfortunately, the lack of stable platforms in earlier stages of system design prevents a developer from performing such evaluation tasks. This paper illustrates how application developers looking for a head start can use the Motorola Timing Simulator for the PowerPC 603™ microprocessor to analyze the expected behavior of a user program for various memory subsystems and gather fairly accurate timing information. A study of some SPEC™ benchmarks is also done in this respect.