Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
New techniques for efficient verification with implicitly conjoined BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
A new scheme for memory-efficient probabilistic verification
IFIP TC6/ 6.1 international conference on formal description techniques IX/protocol specification, testing and verification XVI on Formal description techniques IX : theory, application and tools: theory, application and tools
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
An Analysis of Bitstate Hashing
Formal Methods in System Design
On power-law relationships of the Internet topology
Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
Small worlds: the dynamics of networks between order and randomness
Small worlds: the dynamics of networks between order and randomness
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Comparing Symbolic and Explicit Model Checking of a Software System
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
Exploiting Transition Locality in the Disk Based Mur phi Verifier
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Improved probabilistic verification by hash compaction
CHARME '95 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Exploiting Transition Locality in Automatic Verification
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Ten Years of Partial Order Reduction
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Using Magnatic Disk Instead of Main Memory in the Murphi Verifier
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Reliable Hashing without Collosion Detection
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Parallelizing the Murphi Verifier
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Better Verification Through Symmetry
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
Linked
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Automatic verification of a turbogas control system with the murϕ verifier
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
| Hi-index | 0.00 |
In this paper we present a new algorithm to counteract state explosion when using Explicit State Space Exploration to verify protocol-like systems. We sketch the implementation of our algorithm within the Caching Murϕ verifier and give experimental results showing its effectiveness. We show experimentally that, when memory is a scarce resource, our algorithm improves on the time performances of Caching Murϕ verification algorithm, saving between 16% and 68% (45% on average) in computation time.