Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Design and validation of computer protocols
Design and validation of computer protocols
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
RuleBase: an industry-oriented formal verification tool
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Approximation and decomposition of binary decision diagrams
DAC '98 Proceedings of the 35th annual Design Automation Conference
Model checking
Efficient Detection of Vacuity in Temporal Model Checking
Formal Methods in System Design - Special issue on CAV '97
Symbolic Model Checking
Hints to accelerate Symbolic Traversal
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Pruning Techniques for the SAT-Based Bounded Model Checking Problem
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
On-the-Fly Model Checking of RCTL Formulas
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Efficient Model Checking by Automated Ordering of Transition Relation Partitions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
RuleBase: Model Checking at IBM
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Formal Methods in System Design
From NuSMV to SPIN: Experiences with model checking flight guidance systems
Formal Methods in System Design
Formal Verification of a Flash Memory Device Driver --- An Experience Report
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Model Checking Flight Guidance Systems: from Synchrony to Asynchrony
Electronic Notes in Theoretical Computer Science (ENTCS)
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
Exploiting hub states in automatic verification
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
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There are two main paradigms for model checking: symbolic model checking, as is performed by the tool RuleBase, and explicit state model checking, as is performed by Spin. It is often accepted that the former is better for verifying hardware systems, while the latter has advantages for verifying software. We examine this piece of common wisdom in light of experience in verifying the software of a disk controller using both symbolic and explicit state model checking.