ECAI '92 Proceedings of the 10th European conference on Artificial intelligence
Solving the incremental satisfiability problem
Journal of Logic Programming
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
Algorithms for solving Boolean satisfiability in combinational circuits
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A Computing Procedure for Quantification Theory
Journal of the ACM (JACM)
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Tuning SAT Checkers for Bounded Model Checking
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Robust Search Algorithms for Test Pattern Generation
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
To encode or not to encode-1: linear planning
IJCAI'99 Proceedings of the 16th international joint conference on Artificial intelligence - Volume 2
Comparing Symbolic and Explicit Model Checking of a Software System
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
The Quest for Efficient Boolean Satisfiability Solvers
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Learning from BDDs in SAT-based bounded model checking
Proceedings of the 40th annual Design Automation Conference
Linear-Time Reductions of Resolution Proofs
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
Verification Techniques for System-Level Design
Verification Techniques for System-Level Design
Efficient decision ordering techniques for SAT-based test generation
Proceedings of the Conference on Design, Automation and Test in Europe
A SAT-based Method for Solving the Two-dimensional Strip Packing Problem
Fundamenta Informaticae - RCRA 2008 Experimental Evaluation of Algorithms for Solving Problems with Combinatorial Explosion
Applying SMT in symbolic execution of microcode
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Exact incremental analysis of timed automata with an SMT-solver
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Incremental compilation-to-SAT procedures
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Improved SAT based bounded model checking
TAMC'06 Proceedings of the Third international conference on Theory and Applications of Models of Computation
MDG-SAT: an automated methodology for efficient safety checking
International Journal of Critical Computer-Based Systems
Deriving small unsatisfiable cores with dominators
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Incremental and complete bounded model checking for full PLTL
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Acceleration of SAT-based iterative property checking
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
A case study: formal verification of processor critical properties
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
On solving the partial MAX-SAT problem
SAT'06 Proceedings of the 9th international conference on Theory and Applications of Satisfiability Testing
Directed test generation for validation of multicore architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Automatic RTL Test Generation from SystemC TLM Specifications
ACM Transactions on Embedded Computing Systems (TECS)
Efficient SAT solving under assumptions
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Preprocessing in incremental SAT
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Efficient self-learning techniques for SAT-based test generation
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Verification of partial designs using incremental QBF solving
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Behavioral diagnosis of LTL specifications at operator level
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
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Bounded Model Checking (BMC) is the problem of checking if a model satisfies a temporal property in paths with bounded length k. Propositional SAT-based BMC is conducted in a gradual manner, by solving a series of SAT instances corresponding to formulations of the problem with increasing k. We show how the gradual nature can be exploited for shortening the overall verification time. The concept is to reuse constraints on the search space which are deduced while checking a k instance, for speeding up the SAT checking of the consecutive k+1 instance. This technique can be seen as a generalization of 'pervasive clauses', a technique introduced by Silva and Sakallah in the context of Automatic Test Pattern Generation (ATPG). We define the general conditions for reusability of constraints, and define a simple procedure for evaluating them. This technique can theoretically be used in any solution that is based on solving a series of closely related SAT instances (instances with non-empty intersection between their set of clauses). We then continue by showing how a similar procedure can be used for restricting the search space of individual SAT instances corresponding to BMC invariant formulas. Experiments demonstrated that both techniques have consistent and significant positive effect.