DAC '96 Proceedings of the 33rd annual Design Automation Conference
A satisfiability-based test generator for path delay faults in combinational circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
GRASP—a new search algorithm for satisfiability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Functional vector generation for HDL models using linear programming and 3-satisfiability
DAC '98 Proceedings of the 35th annual Design Automation Conference
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Reasoning in Boolean Networks: Logic Synthesis and Verification Using Testing Techniques
Reasoning in Boolean Networks: Logic Synthesis and Verification Using Testing Techniques
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
SATO: An Efficient Propositional Prover
CADE-14 Proceedings of the 14th International Conference on Automated Deduction
Robust Search Algorithms for Test Pattern Generation
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
An Exact Solution to the Minimum Size Test Pattern Problem
ICCD '98 Proceedings of the International Conference on Computer Design
Using CSP look-back techniques to solve real-world SAT instances
AAAI'97/IAAI'97 Proceedings of the fourteenth national conference on artificial intelligence and ninth conference on Innovative applications of artificial intelligence
Combinational test generation using satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Boolean satisfiability in electronic design automation
Proceedings of the 37th Annual Design Automation Conference
SAT based ATPG using fast justification and propagation in the implication graph
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A BDD-based satisfiability infrastructure using the unate recursive paradigm
DATE '00 Proceedings of the conference on Design, automation and test in Europe
LPSAT: a unified approach to RTL satisfiability
Proceedings of the conference on Design, automation and test in Europe
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Pruning Techniques for the SAT-Based Bounded Model Checking Problem
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Modelling Digital Circuits Problems with Set Constraints
CL '00 Proceedings of the First International Conference on Computational Logic
Towards an Efficient Tableau Method for Boolean Circuit Satisfiability Checking
CL '00 Proceedings of the First International Conference on Computational Logic
Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Simplify: a theorem prover for program checking
Journal of the ACM (JACM)
Functional test generation based on word-level SAT
Journal of Systems Architecture: the EUROMICRO Journal
Cardinal: A Finite Sets Constraint Solver
Constraints
Solving satisfiability in combinational circuits with backtrack search and recursive learning
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
A SAT-based Method for Solving the Two-dimensional Strip Packing Problem
Fundamenta Informaticae - RCRA 2008 Experimental Evaluation of Algorithms for Solving Problems with Combinatorial Explosion
Automated reencoding of boolean formulas
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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