A satisfiability-based test generator for path delay faults in combinational circuits

Test generation for primitive path delay faults in combinational circuits

ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

Algorithms for solving Boolean satisfiability in combinational circuits

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Boolean satisfiability in electronic design automation

Proceedings of the 37th Annual Design Automation Conference

SAT based ATPG using fast justification and propagation in the implication graph

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design

On applying incremental satisfiability to delay fault testing

DATE '00 Proceedings of the conference on Design, automation and test in Europe

Delay fault testing of IP-based designs via symbolic path modeling

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SAT with partial clauses and back-leaps

Proceedings of the 39th annual Design Automation Conference

Path delay fault testing using test points

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Analysis of pattern-dependent and timing-dependent failures in an experimental test chip

ITC '98 Proceedings of the 1998 IEEE International Test Conference

6.3 Experimental Results for IDDQ and VLV Testing

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium

Test Generation for Path-Delay Faults in One-dimensional Iterative Logic Arrays

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Delay Fault Testing of IP-Based Designs Via Symbolic Path Modeling

ITC '99 Proceedings of the 1999 IEEE International Test Conference

Integration of Learning Techniques into Incremental Satisfiability for Efficient Path-Delay Fault Test Generation

Proceedings of the conference on Design, Automation and Test in Europe - Volume 2

Critical Path Selection for Delay Testing Considering Coupling Noise

Journal of Electronic Testing: Theory and Applications

MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics

Journal of Electronic Testing: Theory and Applications