The Area-Time Complexity of Binary Multiplication
Journal of the ACM (JACM)
ACM Computing Surveys (CSUR)
Information transfer and area-time tradeoffs for VLSI multiplication
Communications of the ACM
Computer Logic, Testing and Verification
Computer Logic, Testing and Verification
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Introduction to Switching Theory and Logical Design
Introduction to Switching Theory and Logical Design
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
The Complexity of Equivalence and Containment for Free Single Variable Program Schemes
Proceedings of the Fifth Colloquium on Automata, Languages and Programming
IEEE Transactions on Computers
A three-value computer design verification system
IBM Systems Journal
Application of term rewriting techniques to hardware design verification
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Finding the optimal variable ordering for binary decision diagrams
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
ACM Transactions on Graphics (TOG)
Boolean unification - The story so far
Journal of Symbolic Computation
Locating functional errors in logic circuits
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Test pattern generation for sequential MOS circuits by symbolic fault simulation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Efficient algorithms for computing the longest viable path in a combinational network
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Design of Parity Testable Combinational Circuits
IEEE Transactions on Computers
A Spectral Lower Bound Technique for the Size of Decision Trees and Two-Level AND/OR Circuits
IEEE Transactions on Computers
Finding the Optimal Variable Ordering for Binary Decision Diagrams
IEEE Transactions on Computers
Timing optimization for multi-level combinational networks
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Symbolic prime generation for multiple-valued functions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Implicit and incremental computation of primes and essential primes of Boolean functions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Delay fault test generation for scan/hold circuits using Boolean expressions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Programming and verifying critical systems by means of the synchronous data-flow language LUSTRE
SIGSOFT '91 Proceedings of the conference on Software for citical systems
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Coded time-symbolic simulation using shared binary decision diagram
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Boolean resubstitution with permissible functions and binary decision diagrams
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Accelerating switch-level simulation by function caching
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Utilizing logic information in multi-level timing simulation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Technology mapping for electrically programmable gate arrays
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A synthesis-based test generation and compaction algorithm for multifaults
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Proof-aided design of verified hardware
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Representing circuits more efficiently in symbolic model checking
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Using BDDs to verify multipliers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Breadth-first manipulation of SBDD of Boolean functions for vector processing
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A resynthesis approach for network optimization
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Incremental techniques for the identification of statically sensitizable critical paths
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Transition density, a stochastic measure of activity in digital circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Probabilistic CTSS: analysis of timing error probability in asynchronous logic circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Symbolic simulation—techniques and applications
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Online minimization of transition systems (extended abstract)
STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
On the OBDD-Representation of General Boolean Functions
IEEE Transactions on Computers
A toolbox for the verification of LOTOS programs
ICSE '92 Proceedings of the 14th international conference on Software engineering
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Exact evaluation of diagnostic test resolution
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Efficient sum-to-one subsets algorithm for logic optimization
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Certified timing verification and the transition delay of a logic circuit
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Edge-valued binary decision diagrams for multi-level hierarchical verification
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A new model for improving symbolic product machine traversal
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Exact calculation of synchronization sequences based on binary decision diagrams
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Functional approaches to generating orderings for efficient symbolic representations
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Inductive verification of iterative systems
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Groundness analysis for Prolog: implementation and evaluation of domain prop
PEPM '93 Proceedings of the 1993 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
DESB, a functional abstractor for CMOS VLSI circuits
EURO-DAC '92 Proceedings of the conference on European design automation
EURO-DAC '92 Proceedings of the conference on European design automation
Communication based logic partitioning
EURO-DAC '92 Proceedings of the conference on European design automation
Verification of digital circuits based on formal semantics of a hardware description language
EURO-DAC '92 Proceedings of the conference on European design automation
Boolean matching in logic synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
Maximal reduction of lookup-table based FPGAs
EURO-DAC '92 Proceedings of the conference on European design automation
Locating logic design errors via test generation and don't-care propagation
EURO-DAC '92 Proceedings of the conference on European design automation
Algorithms for approximate FSM traversal
DAC '93 Proceedings of the 30th international Design Automation Conference
Spectral transforms for large boolean functions with applications to technology mapping
DAC '93 Proceedings of the 30th international Design Automation Conference
Surveys in combinatorics, 1993
Surveys in combinatorics, 1993
On computing the transitive closure of a state transition relation
DAC '93 Proceedings of the 30th international Design Automation Conference
Reducing BDD size by exploiting functional dependencies
DAC '93 Proceedings of the 30th international Design Automation Conference
Zero-suppressed BDDs for set manipulation in combinatorial problems
DAC '93 Proceedings of the 30th international Design Automation Conference
High-level symbolic construction technique for high performance sequential synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Linking BDD-based symbolic evaluation to interactive theorem-proving
DAC '93 Proceedings of the 30th international Design Automation Conference
Diagnosis and correction of logic design errors in digital circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
A new viewpoint on two-level logic minimization
DAC '93 Proceedings of the 30th international Design Automation Conference
Optimization of combinational logic circuits based on compatible gates
DAC '93 Proceedings of the 30th international Design Automation Conference
Optimization and resynthesis of complex data-paths
DAC '93 Proceedings of the 30th international Design Automation Conference
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
TITAC: Design of A Quasi-Delay-Insensitive Microprocessor
IEEE Design & Test
Will I be pretty, will I be rich?: some thoughts on theory vs. practice in systems engineering
PODS '94 Proceedings of the thirteenth ACM SIGACT-SIGMOD-SIGART symposium on Principles of database systems
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Protocol testing: review of methods and relevance for software testing
ISSTA '94 Proceedings of the 1994 ACM SIGSOFT international symposium on Software testing and analysis
The Size of Reduced OBDD's and Optimal Read-Once Branching Programs for Almost all Boolean Functions
IEEE Transactions on Computers
Precomputation-based sequential logic optimization for low power
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Incremental formal design verification
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Performance-driven synthesis of asynchronous controllers
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Automatic test program generation for pipelined processors
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Efficient breadth-first manipulation of binary decision diagrams
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A methodology for efficient estimation of switching activity in sequential logic circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
Exact and approximate methods for calculating signal and transition probabilities in FSMs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Rectification of multiple logic design errors in multiple output circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
Error diagnosis for transistor-level verification
DAC '94 Proceedings of the 31st annual Design Automation Conference
Heuristic minimization of BDDs using don't cares
DAC '94 Proceedings of the 31st annual Design Automation Conference
New techniques for efficient verification with implicitly conjoined BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
BDD variable ordering for interacting finite state machines
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fitting formal methods into the design cycle
DAC '94 Proceedings of the 31st annual Design Automation Conference
Boolean matching using generalized Reed-Muller forms
DAC '94 Proceedings of the 31st annual Design Automation Conference
DAC '94 Proceedings of the 31st annual Design Automation Conference
Calculation of unate cube set algebra using zero-suppressed BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Incorporating speculative execution in exact control-dependent scheduling
DAC '94 Proceedings of the 31st annual Design Automation Conference
Automatic verification of pipelined microprocessors
DAC '94 Proceedings of the 31st annual Design Automation Conference
Permissible observability relations in FSM networks
DAC '94 Proceedings of the 31st annual Design Automation Conference
A fully implicit algorithm for exact state minimization
DAC '94 Proceedings of the 31st annual Design Automation Conference
Improving the accuracy of circuit activity measurement
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fast OFDD based minimization of fixed polarity Reed-Muller expressions
EURO-DAC '94 Proceedings of the conference on European design automation
Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping
EURO-DAC '94 Proceedings of the conference on European design automation
Multilevel logic optimization of very high complexity circuits
EURO-DAC '94 Proceedings of the conference on European design automation
An automatically verified generalized multifunction arithmetic pipeline
EURO-DAC '94 Proceedings of the conference on European design automation
BiTeS: a BDD based test pattern generator for strong robust path delay faults
EURO-DAC '94 Proceedings of the conference on European design automation
EURO-DAC '94 Proceedings of the conference on European design automation
(V)HDL-based verification of heterogeneous synchronous/asynchronous systems
EURO-DAC '94 Proceedings of the conference on European design automation
Computing binary decision diagrams for VHDL data types
EURO-DAC '94 Proceedings of the conference on European design automation
Verity—a formal verification program for custom CMOS circuits
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Implementation of the data-flow synchronous language SIGNAL
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Graph models for reachability analysis of concurrent programs
ACM Transactions on Software Engineering and Methodology (TOSEM)
Verus: a tool for quantitative analysis of finite-state real-time systems
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
A method for finding good Ashenhurst decompositions and its application to FPGA synthesis
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Model checking in industrial hardware design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Symbolic fault simulation for sequential circuits and the multiple observation time test strategy
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Analysis of switch-level faults by symbolic simulation
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Symbolic modeling and evaluation of data paths
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Efficient OBDD-based boolean manipulation in CAD beyond current limits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Advanced verification techniques based on learning
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Efficient generation of counterexamples and witnesses in symbolic model checking
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Residue BDD and its application to the verification of arithmetic circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Equivalence checking of datapaths based on canonical arithmetic expressions
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Synthesis of software programs for embedded control application
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Accurate estimation of combinational circuit activity
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Logic synthesis for engineering change
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A partitioning-based logic optimization method for large scale circuits with Boolean matrix
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Automatic clock abstraction from sequential circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Transistor reordering for low power CMOS gates using an SP-BDD representation
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Guarded evaluation: pushing power management to logic synthesis/design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Timing optimization by bit-level arithmetic transformations
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Search space reduction through clustering in test generation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Who are the variables in your neighborhood
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Efficient construction of binary moment diagrams for verifying arithmetic circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
High-density reachability analysis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Completeness and consistency analysis of state-based requirements
Proceedings of the 17th international conference on Software engineering
Binary decision diagrams and beyond: enabling technologies for formal verification
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fast discrete function evaluation using decision diagrams
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fast functional simulation using branching programs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Gate-level simulation of digital circuits using multi-valued Boolean algebras
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power estimation techniques for integrated circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Cost-free scan: a low-overhead scan path design methodology
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Multi-level logic optimization of FSM networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic generation of functional vectors using the extended finite state machine model
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Experiences and lessons from the analysis of TCAS II
ISSTA '96 Proceedings of the 1996 ACM SIGSOFT international symposium on Software testing and analysis
Using BDDs to design ULMs for FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Combined spectral techniques for Boolean matching
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Negation Trees: A Unified Approach to Boolean Function Complementation
IEEE Transactions on Computers
Completeness and Consistency in Hierarchical State-Based Requirements
IEEE Transactions on Software Engineering - Special issue: best papers of the 17th International Conference on Software Engineering (ICSE-17)
Generalized Reed-Muller Forms as a Tool to Detect Symmetries
IEEE Transactions on Computers
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated consistency checking of requirements specifications
ACM Transactions on Software Engineering and Methodology (TOSEM)
Improving the Variable Ordering of OBDDs Is NP-Complete
IEEE Transactions on Computers
Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
BooleDozer: logic synthesis for ASICs
IBM Journal of Research and Development
Checking relational specifications with binary decision diagrams
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
Specification-based testing of synchronous software
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
Model checking large software specifications
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
Verification of electronic systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Design of a logic synthesis system (tutorial)
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A satisfiability-based test generator for path delay faults in combinational circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Multilevel logic synthesis for arithmetic functions
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Synthesis by spectral translation using Boolean decision diagrams
DAC '96 Proceedings of the 33rd annual Design Automation Conference
The automatic generation of functional test vectors for Rambus designs
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Power estimation of cell-based CMOS circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Engineering change in a non-deterministic FSM setting
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An efficient equivalence checker for combinational circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
High performance BDD package by exploiting memory hierarchy
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Implementation of an efficient parallel BDD package
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Formal verification of PowerPC arrays using symbolic trajectory evaluation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Integrating formal verification methods with a conventional project design flow
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Sequential redundancy identification using recursive learning
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
CTL model checking based on forward state traversal
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
VERILAT: verification using logic augmentation and transformations
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A new method to express functional permissibilities for LUT based FPGAs and its applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Fast OFDD-Based Minimization of Fixed Polarity Reed-Muller Expressions
IEEE Transactions on Computers
Symbolic model checking for event-driven real-time systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Using complete-1-distinguishability for FSM equivalence checking
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Noise in deep submicron digital design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Efficient solution of systems of Boolean equations
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Expected current distributions for CMOS circuits
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Suggestion for a New Representation for Binary Function
IEEE Transactions on Computers
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Boolean Functions Classification via Fixed Polarity Reed-Muller Forms
IEEE Transactions on Computers
Power analysis for sequential circuits at logic level
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Library based technology mapping using multiple domain representations
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Compilation of optimized OBDD-algorithms
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
MORE: an alternative implementation of BDD packages by multi-operand synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
BDD-based testability estimation of VHDL designs
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hmap: a fast mapper for EPGAs using extended GBDD hash tables
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A divide-and-conquer approach for asynchronous interface synthesis
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Average and Worst Case Number of Nodes in Decision Diagrams of Symmetric Multiple-Valued Functions
IEEE Transactions on Computers
On the Expressive Power of OKFDDs
Formal Methods in System Design
An Algorithm for Total Symmetric OBDD Detection
IEEE Transactions on Computers
BDDTCL: an environment for visualizing and manipulating binary decision diagrams
Conference Companion on Human Factors in Computing Systems
Symbolic Handling of Bridging Fault Effects
Journal of Electronic Testing: Theory and Applications
Partially-dependent functional decomposition with applications in FPGA synthesis and mapping
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
FPGA routing and routability estimation via Boolean satisfiability
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Automatic verification of pointer programs using monadic second-order logic
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Interleaving based variable ordering methods for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Breadth-first manipulation of very large binary-decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Computing the observable equivalence relation of a finite state machine
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Algebraic decision diagrams and their applications
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Representation and symbolic manipulation of linearly inductive Boolean functions
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Efficient estimation of dynamic power consumption under a real delay model
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
The maximum set of permissible behaviors for FSM networks
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Input don't care sequences in FSM networks
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
An algorithm for improving partitions of pin-limited multi-chip systems
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Boolean matching for full-custom ECL gates
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Tri-state bus conflict checking method for ATPG using BDD
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Verification of large synthesized designs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
HANNIBAL: an efficient tool for logic verification based on recursive learning
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Analysis of cyclic combinational circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Sizing and verification of communication buffers for communicating processes
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Detection of symmetry of Boolean functions represented by ROBDDs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
FGILP: an integer linear program solver based on function graphs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A symbolic algorithm for low-power sequential synthesis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Switching activity estimation using limited depth reconvergent path analysis
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Parallel breadth-first BDD construction
PPOPP '97 Proceedings of the sixth ACM SIGPLAN symposium on Principles and practice of parallel programming
A survey of Boolean matching techniques for library binding
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A graph-based synthesis algorithm for AND/XOR networks
DAC '97 Proceedings of the 34th annual Design Automation Conference
Formal verification of FIRE: a case study
DAC '97 Proceedings of the 34th annual Design Automation Conference
Remembrance of things past: locality and memory in BDDs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Linear sifting of decision diagrams
DAC '97 Proceedings of the 34th annual Design Automation Conference
Safe BDD minimization using don't cares
DAC '97 Proceedings of the 34th annual Design Automation Conference
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
An efficient assertion checker for combinational properties
DAC '97 Proceedings of the 34th annual Design Automation Conference
Toward formalizing a validation methodology using simulation coverage
DAC '97 Proceedings of the 34th annual Design Automation Conference
Functional simulation using binary decision diagrams
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
The disjunctive decomposition of logic functions
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Symbolic analysis of large analog circuits with determinant decision diagrams
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Record & play: a structural fixed point iteration for sequential circuit verification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Forward model checking techniques oriented to buggy designs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Library-less synthesis for static CMOS combinational logic circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Logic synthesis for large pass transistor circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Interconnect layout optimization under higher-order RLC model
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Regular layout generation of logically optimized datapaths
Proceedings of the 1997 international symposium on Physical design
Power optimization for FPGA look-up tables
Proceedings of the 1997 international symposium on Physical design
A Unifying Theoretical Background for Some Bdd-based Data Structures
Formal Methods in System Design
Bounded Delay Timing Analysis of a Class of CSP Programs
Formal Methods in System Design
Indexed BDDs: Algorithmic Advances in Techniques to Represent and Verify Boolean Functions
IEEE Transactions on Computers
IEEE Transactions on Computers
Improving efficiency of symbolic model checking for state-based system requirements
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Verifying systems with integer constraints and Boolean predicates: a composite approach
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Design methodology for the S/390 parallel enterprise server G4 microprocessors
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Abstraction Techniques for Validation Coverage Analysis and Test Generation
IEEE Transactions on Computers
Solving Boolean Equations Using ROSOP Forms
IEEE Transactions on Computers
On the Polynomial Form of Boolean Functions: Derivations and Applications
IEEE Transactions on Computers
On separating the read-k-times branching program hierarchy
STOC '98 Proceedings of the thirtieth annual ACM symposium on Theory of computing
Fast exact minimization of BDDs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Approximation and decomposition of binary decision diagrams
DAC '98 Proceedings of the 35th annual Design Automation Conference
Approximate reachability with BDDs using overlapping projections
DAC '98 Proceedings of the 35th annual Design Automation Conference
Incremental CTL model checking using BDD subsetting
DAC '98 Proceedings of the 35th annual Design Automation Conference
Don't care-based BDD minimization for embedded software
DAC '98 Proceedings of the 35th annual Design Automation Conference
Functional vector generation for HDL models using linear programming and 3-satisfiability
DAC '98 Proceedings of the 35th annual Design Automation Conference
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Efficient state classification of finite state Markov chains
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hybrid verification using saturated simulation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Fault-simulation based design error diagnosis for sequential circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
Hybrid techniques for fast functional simulation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Compatible class encoding in hyper-function decomposition for FPGA synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Computational kernels and their application to sequential power optimization
DAC '98 Proceedings of the 35th annual Design Automation Conference
A case study in embedded system design: an engine control unit
DAC '98 Proceedings of the 35th annual Design Automation Conference
Restricted dynamic Steiner trees for scalable multicast in datagram networks
IEEE/ACM Transactions on Networking (TON)
A method of delay fault test generation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Proving circuit correctness using formal comparison between expected and extracted behaviour
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
CATAPULT: concurrent automatic testing allowing parallelization and using limited topology
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Finding all simple disjunctive decompositions using irredundant sum-of-products forms
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On accelerating pattern matching for technology mapping
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Reencoding for cycle-time minimization under fixed encoding length
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Adaptive variable reordering for symbolic model checking
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Verification by approximate forward and backward reachability
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Tight integration of combinational verification methods
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Sampling schemes for computing OBDD variable orderings
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
The design of a cache-friendly BDD library
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Word-level decision diagrams, WLCDs and division
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Polynomial methods for component matching and verification
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Symbolic model checking of process networks using interval diagram techniques
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
The General Product Machine: a New Model for Symbolic FSM Traversal
Formal Methods in System Design
False path analysis based on hierarchical control representation
Proceedings of the 11th international symposium on System synthesis
Auxiliary variables for BDD-based representation and manipulation of Boolean functions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Compositional verification of concurrent systems using Petri-net-based condensation rules
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic OBDD-based generation of universal plans in non-deterministic domains
AAAI '98/IAAI '98 Proceedings of the fifteenth national/tenth conference on Artificial intelligence/Innovative applications of artificial intelligence
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Using Decision Diagrams to Design ULMs for FPGAs
IEEE Transactions on Computers
On Variable Ordering and Decomposition Type Choice in OKFDDs
IEEE Transactions on Computers
Automatic verification of railway interlocking systems: a case study
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Two-level logic minimization for low power
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Techniques for Reducing the Number of Decisions and Backtracks in Combinational Test Generation
Journal of Electronic Testing: Theory and Applications
Mechanical Verification of Adder Circuits using Rewrite RuleLaboratory
Formal Methods in System Design
A Practical Methodology for the Formal Verification of RISC Processors
Formal Methods in System Design
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
The program decision logic approach to predicated execution
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Hypergraph isomorphism and structural equivalence of Boolean functions
STOC '99 Proceedings of the thirty-first annual ACM symposium on Theory of computing
Scheduling hardware/software systems using symbolic techniques
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Decoupling synchronization from local control for efficient symbolic model checking of statecharts
Proceedings of the 21st international conference on Software engineering
The Theory of Zero-Suppressed BDDs and the Number of Knight‘s Tours
Formal Methods in System Design
Rectification method for lookup-table type FPGA's
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic compositional minimization in CTL model checking
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Verification of asynchronous interface circuits with bounded wire delays
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
ETA: electrical-level timing analysis
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Efficient Boolean function matching
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Query optimization for selections using bitmaps
SIGMOD '99 Proceedings of the 1999 ACM SIGMOD international conference on Management of data
Exact Minimization of Binary Decision Diagrams Using Implicit Techniques
IEEE Transactions on Computers
A Method of Formal Verification of Cryptographic Circuits
Journal of Electronic Testing: Theory and Applications
Symbolic reachability analysis of large finite state machines using don't cares
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Formal verification of word-level specifications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Verifying imprecisely working arithmetic circuits
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Interval diagram techniques for symbolic model checking of Petri nets
DATE '99 Proceedings of the conference on Design, automation and test in Europe
An efficient filter-based approach for combinational verification
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Formally verified redundancy removal
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Polynomial methods for allocating complex components
DATE '99 Proceedings of the conference on Design, automation and test in Europe
On the design of self-checking functional units based on Shannon circuits
DATE '99 Proceedings of the conference on Design, automation and test in Europe
ATPG tools for delay faults at the functional level
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Procedure-Level Verification of Real-time Concurrent Systems
Real-Time Systems
Using lower bounds during dynamic BDD minimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Coverage estimation for symbolic model checking
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Improved approximate reachability using auxiliary state variables
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Automated phase assignment for the synthesis of low power domino circuits
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Cycle-based symbolic simulation of gate-level synchronous circuits
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Wave steering in YADDs: a novel non-iterative synthesis and layout technique
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Detecting false timing paths: experiments on PowerPC microprocessors
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Robust techniques for watermarking sequential circuit designs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Doing two-level logic minimization 100 times faster
Proceedings of the sixth annual ACM-SIAM symposium on Discrete algorithms
A Domain-Specific Language for Regular Sets of Strings and Trees
IEEE Transactions on Software Engineering
Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting
IEEE Transactions on Computers
Ordered Binary Decision Diagrams and Minimal Trellises
IEEE Transactions on Computers
Pseudo-Kronecker Expressions for Symmetric Functions
IEEE Transactions on Computers
Formal verification and analysis of multimedia systems
MULTIMEDIA '99 Proceedings of the seventh ACM international conference on Multimedia (Part 1)
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal Methods in System Design - Special issue on The First Federated Logic Conference (FLOC'96), part II
Novel verification framework combining structural and OBDD methods in a synthesis environment
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A novel high throughput reconfigurable FPGA architecture
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Speeding up symbolic model checking by accelerating dynamic variable reordering
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Prove that a faulty multiplier is faulty!?
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Exact switchbox routing with search space reduction
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Composite model-checking: verification with type-specific symbolic representations
ACM Transactions on Software Engineering and Methodology (TOSEM)
Least Upper Bounds for the Size of OBDDs Using Symmetry Properties
IEEE Transactions on Computers
Hybrid Fault Simulation for Synchronous Sequential Circuits
Journal of Electronic Testing: Theory and Applications
Action Language: a specification language for model checking reactive systems
Proceedings of the 22nd international conference on Software engineering
Proceedings of the 37th Annual Design Automation Conference
To split or to conjoin: the question in image computation
Proceedings of the 37th Annual Design Automation Conference
Symbolic guided search for CTL model checking
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Distance driven finite state machine traversal
Proceedings of the 37th Annual Design Automation Conference
BDS: a BDD-based logic optimization system
Proceedings of the 37th Annual Design Automation Conference
Assertion checking by combined word-level ATPG and modular arithmetic constraint-solving techniques
Proceedings of the 37th Annual Design Automation Conference
Reliable verification using symbolic simulation with scalar values
Proceedings of the 37th Annual Design Automation Conference
Formal verification of an IBM CoreConnect processor local bus arbiter core
Proceedings of the 37th Annual Design Automation Conference
Symbolic timing simulation using cluster scheduling
Proceedings of the 37th Annual Design Automation Conference
Designing systems-on-chip using cores
Proceedings of the 37th Annual Design Automation Conference
Analysis of composition complexity and how to obtain smaller canonical graphs
Proceedings of the 37th Annual Design Automation Conference
Efficient variable ordering using aBDD based sampling
Proceedings of the 37th Annual Design Automation Conference
Implicit enumeration of strongly connected components
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Least fixpoint approximations for reachability analysis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Lazy group sifting for efficient symbolic state traversal of FSMs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Efficient manipulation algorithms for linearly transformed BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Towards true crosstalk noise analysis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Performance optimization using separator sets
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Symbolic functional and timing verification of transistor-level circuits
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Modeling design constraints and biasing in simulation using BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
AQUILA: An Equivalence Checking System for Large Sequential Designs
IEEE Transactions on Computers
A Buffer-Oriented Methodology for Microarchitecture Validation
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
An Efficient Logic Equivalence Checker for Industrial Circuits
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
Automatic Vector Generation Using Constraints and Biasing
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
Free MDD-based software optimization techniques for embedded systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Constructive library-aware synthesis using symmetries
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A BDD-based satisfiability infrastructure using the unate recursive paradigm
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An efficient heuristic approach to solve the unate covering problem
DATE '00 Proceedings of the conference on Design, automation and test in Europe
On the generation of multiplexer circuits for pass transistor logic
DATE '00 Proceedings of the conference on Design, automation and test in Europe
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Putting static analysis to work for verification: A case study
Proceedings of the 2000 ACM SIGSOFT international symposium on Software testing and analysis
FILL and FUNI: algorithms to identify illegal states and sequentially untestable faults
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Verifying Temporal Properties of Reactive Systems: A STeP Tutorial
Formal Methods in System Design
Efficient abstract interpretation using component-wise homomorphisms
Proceedings of the 2nd ACM SIGPLAN international conference on Principles and practice of declarative programming
Parametric Analysis of Computer Systems
Formal Methods in System Design
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
An integrated approach to accelerate data and predicate computations in hyperblocks
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Accurate and efficient predicate analysis with binary decision diagrams
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Interconnect pipelining in a throughput-intensive FPGA architecture
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System
Formal Methods in System Design
Logic Design Validation via Simulation and Automatic Test Pattern Generation
Journal of Electronic Testing: Theory and Applications
Decision Diagram Method for Calculation of Pruned Walsh Transform
IEEE Transactions on Computers
Using SAT for combinational equivalence checking
Proceedings of the conference on Design, automation and test in Europe
Combinational equivalence checking using Boolean satisfiability and binary decision diagrams
Proceedings of the conference on Design, automation and test in Europe
LPSAT: a unified approach to RTL satisfiability
Proceedings of the conference on Design, automation and test in Europe
A boolean satisfiability-based incremental rerouting approach with application to FPGAs
Proceedings of the conference on Design, automation and test in Europe
Streaming BDD manipulation for large-scale combinatorial problems
Proceedings of the conference on Design, automation and test in Europe
Binary decision diagram with minimum expected path length
Proceedings of the conference on Design, automation and test in Europe
Spectral decision diagrams using graph transformations
Proceedings of the conference on Design, automation and test in Europe
AFTA: a formal delay model for functional thinking analysis
Proceedings of the conference on Design, automation and test in Europe
Dynamic minimization of word-level decision diagrams
Proceedings of the conference on Design, automation and test in Europe
Restructuring logic representations with easily detectable simple disjunctive decompositions
Proceedings of the conference on Design, automation and test in Europe
Trace-driven steady-state probability estimation in FSMs with application to power estimation
Proceedings of the conference on Design, automation and test in Europe
Efficient verification using generalized partial order analysis
Proceedings of the conference on Design, automation and test in Europe
Efficient encoding schemes for symbolic analysis of petri nets
Proceedings of the conference on Design, automation and test in Europe
Combinational verification based on high-level functional specifications
Proceedings of the conference on Design, automation and test in Europe
A 16-bit redundant binary multiplier using low-power pass-transistor logic SPL
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Automatic partitioning for efficient combinatorial verification
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
A hardware simulation engine based on decision diagrams (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Exact minimization of fixed polarity Reed-Muller expressions for incompletely specified functions
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
A comparative study of two Boolean formulations of FPGA detailed routing constraints
Proceedings of the 2001 international symposium on Physical design
The multiple variable order problem for binary decision diagrams: theory and practical application
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Application of linearly transformed BDDs in sequential verification
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A new partitioning scheme for improvement of image computation
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Equivalence checking of integer multipliers
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A 3-step approach for performance-driven whole-chip routing
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Design rewiring based on diagnosis techniques
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Low power optimization technique for BDD mapped circuits
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis
Formal Methods in System Design
ACM Transactions on Computational Logic (TOCL)
A Comment on 'Graph-Based Algorithm for Boolean Function Manipulation'
IEEE Transactions on Computers
Optimizing Symbolic Model Checking for Statecharts
IEEE Transactions on Software Engineering - Special issue on 1999 international conference on software engineering
Non-Abelian Groups in Optimization of Decision Diagrams Representations of Discrete Functions
Formal Methods in System Design
Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines
Formal Methods in System Design
An algorithm for bi-decomposition of logic functions
Proceedings of the 38th annual Design Automation Conference
Efficient DDD-based symbolic analysis of large linear analog circuits
Proceedings of the 38th annual Design Automation Conference
Checking equivalence for partial implementations
Proceedings of the 38th annual Design Automation Conference
Computing logic-stage delays using circuit simulation and symbolic elmore analysis
Proceedings of the 38th annual Design Automation Conference
Latency and latch count minimization in wave steered circuits
Proceedings of the 38th annual Design Automation Conference
Automatic predicate abstraction of C programs
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
The pointer assertion logic engine
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Dynamic detection and removal of inactive clauses in SAT with application in image computation
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
A new verification methodology for complex pipeline behavior
Proceedings of the 38th annual Design Automation Conference
Bebop: a path-sensitive interprocedural dataflow engine
PASTE '01 Proceedings of the 2001 ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering
STOC '01 Proceedings of the thirty-third annual ACM symposium on Theory of computing
Automatically validating temporal safety properties of interfaces
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
p2b: a translation utility for linking promela and symbolic model checking (tool paper)
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
Survivability analysis of networked systems
ICSE '01 Proceedings of the 23rd International Conference on Software Engineering
Efficient filtering in publish-subscribe systems using binary decision diagrams
ICSE '01 Proceedings of the 23rd International Conference on Software Engineering
On the power of Las Vegas for one-way communication complexity, OBDDs, and finite automata
Information and Computation
Decomposable negation normal form
Journal of the ACM (JACM)
Using complete-1-distinguishability for FSM equivalence checking
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimizing designs containing black boxes
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The SLAM project: debugging system software via static analysis
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Predicate abstraction for software verification
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Datalog LITE: a deductive query language with linear time model checking
ACM Transactions on Computational Logic (TOCL)
ATPG tools for delay faults at the functional level
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations
Proceedings of the 12th ACM Great Lakes symposium on VLSI
Polynomial circuit models for component matching in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Consistency restoriation and explanations in dynamic CSPs----application to configuration
Artificial Intelligence
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
A note on complexity of OBDD composition and efficiency of partitioned-OBDDs over OBDDs: 1289
IEEE Transactions on Computers
The nonapproximability of OBDD minimization
Information and Computation
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Ordered binary decision diagrams as knowledge-bases
Artificial Intelligence
Efficient state representation for symbolic simulation
Proceedings of the 39th annual Design Automation Conference
Handling special constructs in symbolic simulation
Proceedings of the 39th annual Design Automation Conference
Automated equivalence checking of switch level circuits
Proceedings of the 39th annual Design Automation Conference
Self-referential verification of gate-level implementations of arithmetic circuits
Proceedings of the 39th annual Design Automation Conference
A proof engine approach to solving combinational design automation problems
Proceedings of the 39th annual Design Automation Conference
Satometer:: how much have we searched?
Proceedings of the 39th annual Design Automation Conference
Deriving a simulation input generator and a coverage metric from a formal specification
Proceedings of the 39th annual Design Automation Conference
Linear time datalog and branching time logic
Logic-based artificial intelligence
Boolean satisfiability with transitivity constraints
ACM Transactions on Computational Logic (TOCL)
Logic Synthesis and Verification
Multi-level logic optimization
Logic Synthesis and Verification
Ordered binary decision diagrams
Logic Synthesis and Verification
Combinational and sequential equivalence checking
Logic Synthesis and Verification
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Clairvoyant: a synthesis system for production-based specification
Readings in hardware/software co-design
False-noise analysis using logic implications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Distributed and structured analysis approaches to study large and complex systems
Lectures on formal methods and performance analysis
AnWeb: a system for automatic support to web application verification
SEKE '02 Proceedings of the 14th international conference on Software engineering and knowledge engineering
A Comparison of Free BDDs and Transformed BDDs
Formal Methods in System Design
SIVA: A System for Coverage-Directed State Space Search
Journal of Electronic Testing: Theory and Applications
Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits
Journal of Electronic Testing: Theory and Applications
IEEE Transactions on Computers
Data structures for Boolean functions
Computational Discrete Mathematics
Constraint-based mode analysis of mercury
Proceedings of the 4th ACM SIGPLAN international conference on Principles and practice of declarative programming
Formal Methods in System Design
Energy Efficient Adiabatic Multiplier-Accumulator Design
Journal of VLSI Signal Processing Systems
Analog Integrated Circuits and Signal Processing
Nonmonotonic reasoning: from complexity to algorithms
Annals of Mathematics and Artificial Intelligence
Using computational learning strategies as a tool for combinatorial optimization
Annals of Mathematics and Artificial Intelligence
A comparative study of formal verification techniques for software architecture specifications
Annals of Software Engineering
Spectral Methods in Logical Data Analysis
Automation and Remote Control
A Unifying Approach to Edge-valued and Arithmetic Transform Decision Diagrams
Automation and Remote Control
Information Content of the Ternary Decision Diagrams
Automation and Remote Control
Model Checking Complete Requirements Specifications Using Abstraction
Automated Software Engineering
Refining Model Checking by Abstract Interpretation
Automated Software Engineering
Synthesis of Discrete-Event Controllers Based on the SignalEnvironment
Discrete Event Dynamic Systems
Efficient Computation and Representation of Large Reachability Sets for Composed Automata
Discrete Event Dynamic Systems
Fast Subsumption Checks Using Anti-Links
Journal of Automated Reasoning
Toupie: The µ-calculus over Finite Domains as a Constraint Language
Journal of Automated Reasoning
The Propositional Formula Checker HeerHugo
Journal of Automated Reasoning
Proving Consistency Assertions for Automotive Product Data Management
Journal of Automated Reasoning
Logical Cryptanalysis as a SAT Problem
Journal of Automated Reasoning
Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
Heuristic Learning Based on Genetic Programming
Genetic Programming and Evolvable Machines
Generating Model Checkers from Algebraic Specifications
Formal Methods in System Design
On WLCDs and the Complexity of Word-Level Decision Diagrams—A Lower Bound for Division
Formal Methods in System Design
Efficient Algorithms for the Inference of Minimum Size DFAs
Machine Learning
Counterexample-guided choice of projections in approximate symbolic model checking
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Smart simulation using collaborative formal and simulation engines
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Generalized symmetries in boolean functions
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Induction-based gate-level verification of multipliers
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Partition-based decision heuristics for image computation using SAT and BDDs
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Non-linear quantification scheduling in image computation
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Faster SAT and smaller BDDs via common function structure
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
False-noise analysis using logic implications
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
The small model property: how small can it be?
Information and Computation
BDD-based logic synthesis for LUT-based FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Limits of Using Signatures for Permutation Independent Boolean Comparison
Formal Methods in System Design
Verification of Hierarchical State/Event Systems using Reusability and Compositionality
Formal Methods in System Design
Silicon Debug of a PowerPC™ Microprocessor Using Model Checking
Formal Methods in System Design
Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table
Formal Methods in System Design
A Tutorial on Stålmarck‘s Proof Procedure for PropositionalLogic
Formal Methods in System Design - Special issue on formal methods for computer-added design
Multiway Decision Graphs for Automated Hardware Verification
Formal Methods in System Design
Another Look at LTL Model Checking
Formal Methods in System Design
Factored Edge-Valued Binary Decision Diagrams
Formal Methods in System Design
Arithmetic Boolean Expression Manipulator Using BDDs
Formal Methods in System Design
Spectral Transforms for Large Boolean Functions withApplications to Technology Mapping
Formal Methods in System Design
Multi-Terminal Binary Decision Diagrams: An Efficient DataStructure for Matrix Representation
Formal Methods in System Design
Algebric Decision Diagrams and Their Applications
Formal Methods in System Design
A Symbolic Algorithms for Maximum Flow in 0-1 Networks
Formal Methods in System Design
A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits
Formal Methods in System Design
Polynomial Formal Verification of Multipliers
Formal Methods in System Design
Bounded model checking for the universal fragment of CTL
Fundamenta Informaticae
Quality Assurance in Scripting
IEEE MultiMedia
Formal Verification of VHDL Descriptions in the Prevail Environment
IEEE Design & Test
Automatic Verification of Asynchronous Circuits
IEEE Design & Test
Test Synthesis with Alternative Graphs
IEEE Design & Test
Fast Power Estimation of Large Circuits
IEEE Design & Test
The K*BMD: A Verification Data Structure
IEEE Design & Test
Testing Core-Based Systems: A Symbolic Methodology
IEEE Design & Test
Understanding Integrated Circuits
IEEE Design & Test
Effectiveness of Microarchitecture Test Program Generation
IEEE Design & Test
Validating PowerPC Microprocessor Custom Memories
IEEE Design & Test
Applied Boolean Equivalence Verification and RTL Static Sign-Off
IEEE Design & Test
Practical Formal Verification in Microprocessor Design
IEEE Design & Test
Automating the Design of SOCs Using Cores
IEEE Design & Test
Using Formal Specifications for Functional Validation of Hardware Designs
IEEE Design & Test
A Note on Complexity of OBDD Composition and Efficiency of Partitioned-OBDDs over OBDDs
IEEE Transactions on Computers
A Characterization of Binary Decision Diagrams
IEEE Transactions on Computers
Comments on "A Characterization of Binary Decision Diagrams"
IEEE Transactions on Computers
Least Upper Bounds on OBDD Sizes
IEEE Transactions on Computers
IEEE Transactions on Computers
Efficient Boolean Manipulation with OBDD's Can be Extended to FBDD's
IEEE Transactions on Computers
Test Generation for Path Delay Faults Using Binary Decision Diagrams
IEEE Transactions on Computers
Convergence Properties of Optimization Algorithms for the SAT Problem
IEEE Transactions on Computers
Formal Verification Using Edge-Valued Binary Decision Diagrams
IEEE Transactions on Computers
Global Optimization for Satisfiability (SAT) Problem
IEEE Transactions on Knowledge and Data Engineering
Use of Contextual Information for Feature Ranking and Discretization
IEEE Transactions on Knowledge and Data Engineering
Knowledge-Based Software Architectures: Acquisition, Specification, and Verification
IEEE Transactions on Knowledge and Data Engineering
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
Model Checking Large Software Specifications
IEEE Transactions on Software Engineering
IEEE Transactions on Software Engineering
The BDD space complexity of different forms of concurrency
Fundamenta Informaticae - Application of concurrency to system design
The complexity of minimizing and learning OBDDs and FBDDs
Discrete Applied Mathematics
Integration, the VLSI Journal
Verifying integrity of decision diagrams
Integration, the VLSI Journal
Minimization of word-level decision diagrams
Integration, the VLSI Journal
A fast and accurate delay dependent method for switching estimation of large combinational circuits
Journal of Systems Architecture: the EUROMICRO Journal
An open framework for data-flow analysis in Java: extended abstract
PPPJ '02/IRE '02 Proceedings of the inaugural conference on the Principles and Practice of programming, 2002 and Proceedings of the second workshop on Intermediate representation engineering for virtual machines, 2002
Lower bounds for linearly transformed OBDDs and FBDDs
Journal of Computer and System Sciences
A Symbolic Inject-and-Evaluate Paradigm for Byzantine Fault Diagnosis
Journal of Electronic Testing: Theory and Applications
Comparing HOL and MDG: a case study on the verification of an ATM switch fabric
Nordic Journal of Computing
Translation among CNFs, characteristic models and ordered binary decision diagrams
Information Processing Letters
Experience with Applying Formal Methods to Protocol Specification and System Architecture
Formal Methods in System Design
Verisym: Verifying Circuits by Symbolic Simulation
Formal Methods in System Design
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions
Formal Methods in System Design
Computing strongly connected components in a linear number of symbolic steps
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
An Evolutionary Method Using Crossover in a Food Chain Simulation
ECAL '99 Proceedings of the 5th European Conference on Advances in Artificial Life
Improving the Representation of Infinite Trees to Deal with Sets of Trees
ESOP '00 Proceedings of the 9th European Symposium on Programming Languages and Systems
Representing Arithmetic Constraints with Finite Automata: An Overview
ICLP '02 Proceedings of the 18th International Conference on Logic Programming
A Method for Automatic Cryptographic Protocol Verification
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
Using BDDs with Combinations of Theories
LPAR '02 Proceedings of the 9th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
Formal Verification and Hardware Design with Statecharts
Proceedings of the ESPRIT Working Group 8533 on Prospects for Hardware Foundations: NADA - New Hardware Design Methods, Survey Chapters
The Complexity of Minimizing FBDDs
MFCS '99 Proceedings of the 24th International Symposium on Mathematical Foundations of Computer Science
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
Binary Decision Diagrams by Shard Rewriting
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
Logic Programs as Compact Denotations
PADL '03 Proceedings of the 5th International Symposium on Practical Aspects of Declarative Languages
A Hierarchy Result for Read-Once Branching Programs with Restricted Parity Nondeterminism
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
Graph-Driven Free Parity BDDs: Algorithms and Lower Bounds
MFCS '01 Proceedings of the 26th International Symposium on Mathematical Foundations of Computer Science
MFCS '02 Proceedings of the 27th International Symposium on Mathematical Foundations of Computer Science
Advances in Model Representations
PAPM-PROBMIV '01 Proceedings of the Joint International Workshop on Process Algebra and Probabilistic Methods, Performance Modeling and Verification
Deriving Symbolic Representations from Stochastic Process Algebras
PAPM-PROBMIV '02 Proceedings of the Second Joint International Workshop on Process Algebra and Probabilistic Methods, Performance Modeling and Verification
Symbolic Heuristic Search Using Decision Diagrams
Proceedings of the 5th International Symposium on Abstraction, Reformulation and Approximation
Distributed Hybrid Genetic Programming for Learning Boolean Functions
PPSN VI Proceedings of the 6th International Conference on Parallel Problem Solving from Nature
Analyzing Mode Confusion via Model Checking
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
Comparing Symbolic and Explicit Model Checking of a Software System
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
Multiple State and Single State Tableaux for Combining Local and Global Model Checking
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
Defeasible Constraint Solving over the Booleans
IBERAMIA '98 Proceedings of the 6th Ibero-American Conference on AI: Progress in Artificial Intelligence
Region Encoding Diagram for Fully Symbolic Verification of Real-Time Systems
COMPSAC '00 24th International Computer Software and Applications Conference
Concurrent Embedded Real-Time Software Verification
COMPSAC '00 24th International Computer Software and Applications Conference
BDD-Nodes Can Be More Expressive
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
ASIAN '00 Proceedings of the 6th Asian Computing Science Conference on Advances in Computing Science
Finite Digital Synchronous Circuits Are Characterized by 2-Algebraic Truth Tables
ASIAN '00 Proceedings of the 6th Asian Computing Science Conference on Advances in Computing Science
AI '99 Proceedings of the 12th Australian Joint Conference on Artificial Intelligence: Advanced Topics in Artificial Intelligence
Factorizing Equivalent Variable Pairs in ROBDD-Based Implementations of Pos
AMAST '98 Proceedings of the 7th International Conference on Algebraic Methodology and Software Technology
FAABS '00 Proceedings of the First International Workshop on Formal Approaches to Agent-Based Systems-Revised Papers
Approximations by OBDDs and the Variable Ordering Problem
ICAL '99 Proceedings of the 26th International Colloquium on Automata, Languages and Programming
Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Security Goals: Packet Trajectories and Strand Spaces
FOSAD '00 Revised versions of lectures given during the IFIP WG 1.7 International School on Foundations of Security Analysis and Design on Foundations of Security Analysis and Design: Tutorial Lectures
Simplifying Circuits for Formal Verification Using Parametric Representation
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Abstraction by Symbolic Indexing Transformations
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Deciding Presburger Arithmetic by Model Checking and Comparisons with Other Methods
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Traversal Techniques for Concurrent Systems
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Multi-objected Optimization in Evolutionary Algorithms Using Satisfiability Classes
Proceedings of the 6th International Conference on Computational Intelligence, Theory and Applications: Fuzzy Days
Exploiting Transition Locality in the Disk Based Mur phi Verifier
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Too Much Knowledge Hurts: Acceleration of Genetic Programs for Learning Heuristics
Proceedings of the International Conference, 7th Fuzzy Days on Computational Intelligence, Theory and Applications
Formal Verification of a SONET Telecom System Block
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Asymptotically Optimal Bounds for OBDDs and the Solution of Some Basic OBDD Problems
ICALP '00 Proceedings of the 27th International Colloquium on Automata, Languages and Programming
Ordered Binary Decision Diagrams as Knowledge-Bases
ISAAC '99 Proceedings of the 10th International Symposium on Algorithms and Computation
Reasoning with Ordered Binary Decision Diagrams
ISAAC '00 Proceedings of the 11th International Conference on Algorithms and Computation
Translation among CNFs, Characteristic Models and Ordered Binary Decision Diagrams
ISAAC '01 Proceedings of the 12th International Symposium on Algorithms and Computation
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Transitive Closures of Regular Relations for Verifying Infinite-State Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Efficient Data Structure for Fully Symbolic Verification of Real-Time Software Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Symbolic Representation of Upward-Closed Sets
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Symbolic Reachability Analysis Based on SAT-Solvers
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Satisfiability Checking Using Boolean Expression Diagrams
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Searching Powerset Automata by Combining Explicit-State and Symbolic Model Checking
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
UPPAAL - Now, Next, and Future
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Model Checking: A Tutorial Overview
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
A Library for Composite Symbolic Representations
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A Sweep-Line Method for State Space Exploration
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Saturation: An Efficient Iteration Strategy for Symbolic State-Space Generation
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Model Checking Large-Scale and Parameterized Resource Allocation Systems
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Probabilistic Symbolic Model Checking with PRISM: A Hybrid Approach
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Relative Completeness of Abstraction Refinement for Software Model Checking
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Symbolic Functional Evaluation
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Spatial Information Revision: A Comparison between 3 Approaches
ECSQARU '01 Proceedings of the 6th European Conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
New Bounds on the OBDD-Size of Integer Multiplication via Universal Hashing
STACS '01 Proceedings of the 18th Annual Symposium on Theoretical Aspects of Computer Science
Verifying BDD Algorithms through Monadic Interpretation
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Efficient Verification of Timed Automata with BDD-Like Data-Structures
VMCAI 2003 Proceedings of the 4th International Conference on Verification, Model Checking, and Abstract Interpretation
Complexity Theoretical Results on Nondeterministic Graph-Driven Read-Once Branching Programs
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
An Efficient Algorithm to Compute the Synchronized Product
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Approximate Symbolic Model Checking of Continuous-Time Markov Chains
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Techniques for Smaller Intermediary BDDs
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Divide and Compose: SCC Refinement for Language Emptiness
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Reducing Model Checking from Multi-valued {\rm CTL}^{\ast} to {\rm CTL}^{\ast}
CONCUR '02 Proceedings of the 13th International Conference on Concurrency Theory
Compositional Reasoning in Model Checking
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Symbolic Simulation of Microprocessor Models using Type Classes in Haskell
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Hints to accelerate Symbolic Traversal
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Abstract BDDs: A Technque for Using Abstraction in Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Automatic Error Correction of Large Circuits Using Boolean Decomposition and Abstraction
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Exploiting Transition Locality in Automatic Verification
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Practical Point-in-Polygon Tests Using CSG Representations of Polygons
ALENEX '99 Selected papers from the International Workshop on Algorithm Engineering and Experimentation
Using Abstract Specifications to Verify PowerPCTM Custom Memories by Symbolic Trajectory Evaluation
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Efficient Debugging in a Formal Verification Environment
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Heuristic Learning Based on Genetic Programming
EuroGP '01 Proceedings of the 4th European Conference on Genetic Programming
PSI '99 Proceedings of the Third International Andrei Ershov Memorial Conference on Perspectives of System Informatics
Resolution and Binary Decision Diagrams Cannot Simulate Each Other Polynomially
PSI '02 Revised Papers from the 4th International Andrei Ershov Memorial Conference on Perspectives of System Informatics: Akademgorodok, Novosibirsk, Russia
Heuristics for Efficient Manipulation of Composite Constraints
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Stability of Discrete Sampled Systems
FTRTFT '00 Proceedings of the 6th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Verification of Timed Automata via Satisfiability Checking
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Lower Bounds for Linear Transformed OBDDs and FBDDs (Extende Abstract)
Proceedings of the 19th Conference on Foundations of Software Technology and Theoretical Computer Science
Proceedings of the 19th Conference on Foundations of Software Technology and Theoretical Computer Science
Model Checking: Theory into Practice
FST TCS 2000 Proceedings of the 20th Conference on Foundations of Software Technology and Theoretical Computer Science
TABLEAUX '99 Proceedings of the International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
Sample Method for Minimization of OBDDs
SOFSEM '98 Proceedings of the 25th Conference on Current Trends in Theory and Practice of Informatics: Theory and Practice of Informatics
Solving Factored MDPs with Large Action Space Using Algebraic Decision Diagrams
PRICAI '02 Proceedings of the 7th Pacific Rim International Conference on Artificial Intelligence: Trends in Artificial Intelligence
Formal Verification Methods for Industrial Hardware Design
SOFSEM '01 Proceedings of the 28th Conference on Current Trends in Theory and Practice of Informatics Piestany: Theory and Practice of Informatics
BDD-Based Cryptanalysis of Keystream Generators
EUROCRYPT '02 Proceedings of the International Conference on the Theory and Applications of Cryptographic Techniques: Advances in Cryptology
A New Class of Functions for Abstract Interpretation
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
Model-Checking: A Tutorial Introduction
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
Checking Safety Properties of Behavioral VHDL Descriptions by Abstract Interpretation
SAS '02 Proceedings of the 9th International Symposium on Static Analysis
Automata and Binary Decision Diagrams
WIA '98 Revised Papers from the Third International Workshop on Automata Implementation
FA Minimisation Heuristics for a Class of Finite Languages
WIA '99 Revised Papers from the 4th International Workshop on Automata Implementation
Verifying Integrity of Decision Diagrams
SAFECOMP '98 Proceedings of the 17th International Conference on Computer Safety, Reliability and Security
Progress on the State Explosion Problem in Model Checking
Informatics - 10 Years Back. 10 Years Ahead.
Random 3-SAT: The Plot Thickens
CP '02 Proceedings of the 6th International Conference on Principles and Practice of Constraint Programming
Random 3-SAT and BDDs: The Plot Thickens Further
CP '01 Proceedings of the 7th International Conference on Principles and Practice of Constraint Programming
Connections Reservation with Rerouting for ATM Networks: A Hybrid Approach with Constraints
CP '02 Proceedings of the 8th International Conference on Principles and Practice of Constraint Programming
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
Timed Verification of Asynchronous Circuits
Concurrency and Hardware Design, Advances in Petri Nets
Towards an Efficient Tableau Method for Boolean Circuit Satisfiability Checking
CL '00 Proceedings of the First International Conference on Computational Logic
k-Layer Straightline Crossing Minimization by Speeding Up Sifting
GD '00 Proceedings of the 8th International Symposium on Graph Drawing
A Symbolic Model Checker for ACTL
FM-Trends 98 Proceedings of the International Workshop on Current Trends in Applied Formal Method: Applied Formal Methods
Coverage Directed Generation of System-Level Test Cases for the Validation of a DSP System
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
FME '02 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods - Getting IT Right
A Generalised Sweep-Line Method for Safety Properties
FME '02 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods - Getting IT Right
An Algorithmic Approach to Design Exploration
FME '02 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods - Getting IT Right
On-the-Fly Verification of Linear Temporal Logic
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
IF: An Intermediate Representation and Validation Environment for Timed Asynchronous Systems
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Error Detection with Directed Symbolic Model Checking
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Symbolic Model Checking with Fewer Fixpoint Computations
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Optimizing Symbolic Model Checking for Constraint-Rich Models
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Decision Procedures for Model Checking of Linear Time Logic Properties
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
On the Representation of Probabilities over Structured Domains
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Stepwise CTL Model Checking of State/Event Systems
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Analysis of Cyclic Definitions
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Reachability Set Generation and Storage Using Decision Diagrams
Proceedings of the 20th International Conference on Application and Theory of Petri Nets
Structural Methods to Improve the Symbolic Analysis of Petri Nets
Proceedings of the 20th International Conference on Application and Theory of Petri Nets
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Abstractions and Partial Order Reductions for Checking Branching Properties of Time Petri Nets
ICATPN '01 Proceedings of the 22nd International Conference on Application and Theory of Petri Nets
Data Decision Diagrams for Petri Net Analysis
ICATPN '02 Proceedings of the 23rd International Conference on Applications and Theory of Petri Nets
Distributed Symbolic Model Checking for µ-Calculus
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF(2m)
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Combining Symmetry Reduction and Under-Approximation for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
The Quest for Efficient Boolean Satisfiability Solvers
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Symbolic Analysis of Transition Systems
ASM '00 Proceedings of the International Workshop on Abstract State Machines, Theory and Applications
Searching for Mutual Exclusion Algorithms Using BDDs
Progress in Discovery Science, Final Report of the Japanese Discovery Science Project
CSL '99 Proceedings of the 13th International Workshop and 8th Annual Conference of the EACSL on Computer Science Logic
Toward Genomic Hypothesis Creator: View Designer for Discovery
DS '98 Proceedings of the First International Conference on Discovery Science
Symbolic Methods for the State Space Exploration of GSPN Models
TOOLS '02 Proceedings of the 12th International Conference on Computer Performance Evaluation, Modelling Techniques and Tools
Multi-objective Optimisation Based on Relation Favour
EMO '01 Proceedings of the First International Conference on Evolutionary Multi-Criterion Optimization
Formally Linking MDG and HOL Based on a Verified MDG System
IFM '02 Proceedings of the Third International Conference on Integrated Formal Methods
Implicit test generation for behavioral VHDL models
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Switch-level bridging fault simulation in the presence of feedbacks
ITC '98 Proceedings of the 1998 IEEE International Test Conference
An algorithmic approach to optimizing fault coverage for BIST logic synthesis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Accumulator based deterministic BIST
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Bisimulation Algorithms for Stochastic Process Algebras and Their BDD-Based Implementation
ARTS '99 Proceedings of the 5th International AMAST Workshop on Formal Methods for Real-Time and Probabilistic Systems
ProbVerus: Probabilistic Symbolic Model Checking
ARTS '99 Proceedings of the 5th International AMAST Workshop on Formal Methods for Real-Time and Probabilistic Systems
Integrating Boolean and Mathematical Solving: Foundations, Basic Algorithms, and Requirements
AISC '02/Calculemus '02 Proceedings of the Joint International Conferences on Artificial Intelligence, Automated Reasoning, and Symbolic Computation
Applying the Davis-Putnam Procedure to Non-clausal Formulas
AI*IA '99 Proceedings of the 6th Congress of the Italian Association for Artificial Intelligence on Advances in Artificial Intelligence
An Optimized S-Box Circuit Architecture for Low Power AES Design
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A New 3D 6-Subiteration Thinning Algorithm Based on P-Simple Points
DGCI '02 Proceedings of the 10th International Conference on Discrete Geometry for Computer Imagery
Language Containment Checking with Nondeterministic BDDs
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Automatic Verification of Pointer Data-Structure Systems for All Numbers of Processes
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Verification of Hierarchical State/Event Systems Using Reusability and Compositionality
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
CIAA '00 Revised Papers from the 5th International Conference on Implementation and Application of Automata
Towards Automated Proof of Fail-Safe Behaviour
SAFECOMP '98 Proceedings of the 17th International Conference on Computer Safety, Reliability and Security
Solving the Entailment Problem in the Fluent Calculus Using Binary Decision Diagrams
CL '00 Proceedings of the First International Conference on Computational Logic
Tutorial: Compiling concurrent languages for sequential processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An incremental unique representation for regular trees
Nordic Journal of Computing
MuTaTe: an efficient design for testability technique for multiplexor based circuits
Proceedings of the 13th ACM Great Lakes symposium on VLSI
FORCE: a fast and easy-to-implement variable-ordering heuristic
Proceedings of the 13th ACM Great Lakes symposium on VLSI
A differential approach to inference in Bayesian networks
Journal of the ACM (JACM)
Model checking: a tutorial overview
Modeling and verification of parallel processes
Modeling and verification of parallel processes
Journal of Symbolic Computation
Infinitary relations and their representation
Science of Computer Programming - Special issue on static analysis (SAS'99)
Nordic Journal of Computing
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Combinational equivalence checking through function transformation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Simplification of non-deterministic multi-valued networks
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Resynthesis of multi-level circuits under tight constraints using symbolic optimization
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
ATPG-based logic synthesis: an overview
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A new enhanced constructive decomposition and mapping algorithm
Proceedings of the 40th annual Design Automation Conference
Large-scale SOP minimization using decomposition and functional properties
Proceedings of the 40th annual Design Automation Conference
Advanced techniques for RTL debugging
Proceedings of the 40th annual Design Automation Conference
Symbolic representation with ordered function templates
Proceedings of the 40th annual Design Automation Conference
Checking satisfiability of a conjunction of BDDs
Proceedings of the 40th annual Design Automation Conference
Learning from BDDs in SAT-based bounded model checking
Proceedings of the 40th annual Design Automation Conference
Static noise analysis with noise windows
Proceedings of the 40th annual Design Automation Conference
A compiler for deterministic, decomposable negation normal form
Eighteenth national conference on Artificial intelligence
SetA*: an efficient BDD-based heuristic search algorithm
Eighteenth national conference on Artificial intelligence
Information and Computation - Special issue: LICS'97
Information Processing Letters
Wave steering to integrate logic and physical syntheses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Handbook of automated reasoning
Modeling methodology for integrated simulation of embedded systems
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Pair-independence and freeness analysis through linear refinement
Information and Computation
A static analyzer for large safety-critical software
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Low power design and its testability
ATS '95 Proceedings of the 4th Asian Test Symposium
Sequential logic path delay test generation by symbolic analysis
ATS '95 Proceedings of the 4th Asian Test Symposium
Quasi-algebraic decompositions of switching functions
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Optimization of combinational and sequential logic circuits for low power using precomputation
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
On applicability of symbolic techniques to larger scheduling problems
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Improved technology mapping using a new approach to Boolean matching
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Synthesis of multilevel fault-tolerant combinational circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Modeling and optimization of hierarchical synchronous circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Improved sequential ATPG using functional observation information and new justification methods
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Using symbolic techniques to find the maximum clique in very large sparse graphs
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Proving testing preorders for process algebra descriptions
EDTC '95 Proceedings of the 1995 European conference on Design and Test
A BIST approach to delay fault testing with reduced test length
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Implicit manipulation of polynomials using zero-suppressed BDDs
EDTC '95 Proceedings of the 1995 European conference on Design and Test
How many decomposition types do we need? [decision diagrams]
EDTC '95 Proceedings of the 1995 European conference on Design and Test
VERIFUL: VERIfication using FUnctional Learning
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Enhanced testing performance via unbiased test sets
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Sequential Permissible Functions and their Application to Circuit Optimization
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Exploiting Functional Dependencies in Finite State Machine Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
An Efficient Algorithm for Real-Time Symbolic Model Checking
EDTC '96 Proceedings of the 1996 European conference on Design and Test
K*BMDs: A New Data Structure for Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Fast and Efficient Construction of BDDs by Reordering Based Synthesis
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Using MTBDDs for Discrete Timed Symbolic Model Checking
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Fast power loss calculation for digital static CMOS circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Partial-Order Methods for Model Checking: From Linear Time to Branching Time
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Two Formal Analys s of Attack Graphs
CSFW '02 Proceedings of the 15th IEEE workshop on Computer Security Foundations
On the non-termination of MDG-based abstract state enumeration
Theoretical Computer Science
Symbolic Verification and Analysis of Discrete Timed Systems
Formal Methods in System Design
A symbolic simulation approach in resolving signals' correlation
SS '96 Proceedings of the 29th Annual Simulation Symposium (SS '96)
Efficient variable ordering and partial representation algorithm
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Characteristic polynomial method for verification and test of combinational circuits
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
LUT-based FPGA Technology Mapping using Permissible Functions
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
A study of composition schemes for mixed apply/compose based construction of ROBDDs
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
On Finding Functionally Identical and Functionally Opposite Lines in Combinational Logic Circuits
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
On More Efficient Combinational ATPG Using Functional Learning
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Formal Verification of Digital Systems
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Formal Verification of Combinational Circuit
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Some Recent Advances in Software and Hardware Logic Simulation
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Pseudo Kronecker Expressions for Symmetric Functions
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Property-Specific Testbench Generation for Guided Simulation
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Improved SAT-based Bounded Reachability Analysis
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
9.3 Improving Path Delay Fault Testability by Path Removal
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
8.4 Undetectable Fault Removal of Sequential Circuits Based on Unreachable States
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Automatic verification of industrial designs
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Timing analysis of industrial real-time systems
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Restricted Dynamic Steiner Trees for Scalable Multicast in Datagram Networks
INFOCOM '97 Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
Static Property Checking Using ATPG v.s. BDD Techniques
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Exact Path Delay Grading with Fundamental BDD Operations
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A complete adaptive algorithm for propositional satisfiability
Discrete Applied Mathematics
ErrorTracer: A Fault Simulation-Based Approach to Design Erorr Diagnosis
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Analyzing a PowerPC" 620 Microprocessor Silicon Failure using Model Checking
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Efficient Dynamic Minimization of Word-Level DDs Based on Lower Bound Computation
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Minimization of Ordered Pseudo Kronecker Decision Diagrams
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
ATPG for Path Delay Faults without Path Enumeration
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Automatic Functional Vector Generation Using the Interacting FSM Model
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
A Formal Approach to Testing Lustre Specifications
ICFEM '97 Proceedings of the 1st International Conference on Formal Engineering Methods
A genetic algorithm for decomposition type choice in OKFDDs
INBS '95 Proceedings of the First International Symposium on Intelligence in Neural and Biological Systems (INBS'95)
Efficient Hierarchical Approach to Test Generation for Digital Systems
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Power Bus Maximum Voltage Drop in Digital VLSI Circuits
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Algorithms and heuristics in VLSI design
Experimental algorithmics
Alis: a light-weight logic synthesis for digital signal processing of audio visual
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
Formal Methods of Analysis of System Properties
Cybernetics and Systems Analysis
Guess-and-verify versus unrestricted nondeterminism for OBDDs and one-way Turing machines
Journal of Computer and System Sciences
From type inference to configuration
The essence of computation
Automated Validation of Software Models
Proceedings of the 16th IEEE international conference on Automated software engineering
Weak, strong, and strong cyclic planning via symbolic model checking
Artificial Intelligence - special issue on planning with uncertainty and incomplete information
OBDD-Based Optimization of Input Probabilities for Weighted Random Pattern Generation
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Counterexample-guided abstraction refinement for symbolic model checking
Journal of the ACM (JACM)
The semantics and execution of a synchronous block-diagram language
Science of Computer Programming
Planar Multiple-Valued Decision Diagrams
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
Reed-Muller Forms for Incompletely Specified Functions via Sparse Polynomial Interpolation
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
Functional Decision Diagrams for Multiple-Valued Functions
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
Overapproximating Reachable Sets by Hamilton-Jacobi Projections
Journal of Scientific Computing
On the design of problem-specific evolutionary algorithms
Advances in evolutionary computing
Random 3-SAT: The Plot Thickens
Constraints
Pattern-based verification of connections to intellectual property cores
Integration, the VLSI Journal
Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
IEEE Transactions on Computers
PITIA: an FPGA for throughput-intensive applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Accurate estimation of cache-related preemption delay
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
ACM Transactions on Programming Languages and Systems (TOPLAS)
Integration, the VLSI Journal
A case study in computer-aided codesign of embedded controllers
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Approximating minimal unsatisfiable subformulae by means of adaptive core search
Discrete Applied Mathematics - The renesse issue on satisfiability
How to fake an RSA signature by encoding modular root finding as a SAT problem
Discrete Applied Mathematics - The renesse issue on satisfiability
Resolution and binary decision diagrams cannot simulate each other polynomially
Discrete Applied Mathematics - The renesse issue on satisfiability
A satisfiability procedure for quantified boolean formulae
Discrete Applied Mathematics - The renesse issue on satisfiability
From Pre-Historic to Post-Modern Symbolic Model Checking
Formal Methods in System Design
A tutorial introduction to symbolic model checking
Logic for concurrency and synchronisation
Simulation based verification of register-transfer level behavioral synthesis tools
EURO-DAC '90 Proceedings of the conference on European design automation
SLOCOP-II: a versatile timing verification system for MOSVLSI
EURO-DAC '90 Proceedings of the conference on European design automation
Fast functional evaluation of candidate OBDD variable orderings
EURO-DAC '91 Proceedings of the conference on European design automation
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
A lower bound for integer multiplication on randomized ordered read-once branching programs
Information and Computation
Computing System Failure Frequencies and Reliability Importance Measures Using OBDD
IEEE Transactions on Computers
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
The data mining approach to automated software testing
Proceedings of the ninth ACM SIGKDD international conference on Knowledge discovery and data mining
Conquering Uncertainty in Multiple-Valued Logic Design
Artificial Intelligence Review
Fundamenta Informaticae - Special issue on computing patterns in strings
Fibonacci spectral transforms: calculation, algorithms and circuit realizations
Systems Analysis Modelling Simulation - Special issue: Digital signal processing and control
A BDD-Based Algorithm for Analysis of Multistate Systems with Multistate Components
IEEE Transactions on Computers
An example of linking formal methods with case tools: a model checker for statecharts
CASCON '93 Proceedings of the 1993 conference of the Centre for Advanced Studies on Collaborative research: software engineering - Volume 1
Incremental execution of transformation specifications
Proceedings of the 31st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Proceedings of the conference on Design, automation and test in Europe - Volume 1
MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions
Proceedings of the conference on Design, automation and test in Europe - Volume 2
MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor
Proceedings of the conference on Design, automation and test in Europe - Volume 2
A Framework for Battery-Aware Sensor Management
Proceedings of the conference on Design, automation and test in Europe - Volume 2
False-Noise Analysis for Domino Circuits
Proceedings of the conference on Design, automation and test in Europe - Volume 2
An Overview of the Runtime Verification Tool Java PathExplorer
Formal Methods in System Design
An efficient algorithm for computing bisimulation equivalence
Theoretical Computer Science
Improving Gate-Level Simulation of Quantum Circuits
Quantum Information Processing
Implicit GSPN reachability set generation using decision diagrams
Performance Evaluation - Dependable systems and networks-performance and dependability symposium (DSN-PDS) 2002: Selected papers
BDDs: design, analysis, complexity, and applications
Discrete Applied Mathematics - Optimal discrete structure and algorithms (ODSA 2000)
The complexity of checking consistency of pedigree information and related problems
Journal of Computer Science and Technology - Special issue on bioinformatics
Formally analyzing software architectural specifications using SAM
Journal of Systems and Software
Probabilistic decision graphs-combining verification and AI techniques for probabilistic inference
International Journal of Uncertainty, Fuzziness and Knowledge-Based Systems - New trends in probabilistic graphical models
Abstraction of assembler programs for symbolic worst case execution time analysis
Proceedings of the 41st annual Design Automation Conference
An efficient finite-domain constraint solver for circuits
Proceedings of the 41st annual Design Automation Conference
A robust algorithm for approximate compatible observability don't care (CODC) computation
Proceedings of the 41st annual Design Automation Conference
Symmetry detection for incompletely specified functions
Proceedings of the 41st annual Design Automation Conference
Implicit enumeration of structural changes in circuit optimization
Proceedings of the 41st annual Design Automation Conference
Implicit pseudo boolean enumeration algorithms for input vector control
Proceedings of the 41st annual Design Automation Conference
Quantum logic synthesis by symbolic reachability analysis
Proceedings of the 41st annual Design Automation Conference
Cloning-based context-sensitive pointer alias analysis using binary decision diagrams
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Symbolic pointer analysis revisited
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Flattening statecharts without explosions
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Fibonacci Arithmetic Expressions
Automation and Remote Control
Representation of Logical Circuits by Linear Decision Diagrams with Extension to Nanostructures
Automation and Remote Control
Automation and Remote Control
Mixed-radix MVL Function Spectral and Decision Diagram Representation
Automation and Remote Control
A 3D 12-subiteration thinning algorithm based on P-simple points
Discrete Applied Mathematics - The 2001 international workshop on combinatorial image analysis (IWCIA 2001)
IEEE Transactions on Software Engineering
Compositional Verification of Middleware-Based Software Architecture Descriptions
Proceedings of the 26th International Conference on Software Engineering
Formal Methods in System Design
Static Analysis for State-Space Reductions Preserving Temporal Logics
Formal Methods in System Design
RTL Power Optimization with Gate-Level Accuracy
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
The Compositional Far Side of Image Computation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Iterative Abstraction using SAT-based BMC with Proof Analysis
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
IBM Journal of Research and Development - Mathematics and computing
Theoretical Computer Science
Ackermann encoding, bisimulations and OBDDs
Theory and Practice of Logic Programming
On Stratified Belief Base Compilation
Annals of Mathematics and Artificial Intelligence
Enhancing the performance of multi-cycle path analysis in an industrial setting
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
On deriving equivalent architecture model from system specification
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Model checking on state transition diagram
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Improving simulation-based verification by means of formal methods
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Minimization of the expected path length in BDDs based on local changes
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Minimization of memory size for heterogeneous MDDs
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Combining ordered best-first search with branch and bound for exact BDD minimization
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
An information statistics approach to data stream and communication complexity
Journal of Computer and System Sciences - Special issue on FOCS 2002
Pipelining Sequential Circuits with Wave Steering
IEEE Transactions on Computers
Fast Computation of Data Correlation Using BDDs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Combination of Lower Bounds in Exact BDD Minimization
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Set Manipulation with Boolean Functional Vectors for Symbolic Reachability Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Causality analysis of synchronous programs with delayed actions
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
HOIST: a system for automatically deriving static analyzers for embedded systems
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Data-Mining Synthesised Schedulers for Hard Real-Time Systems
Proceedings of the 19th IEEE international conference on Automated software engineering
Model-Based Evaluation: From Dependability to Security
IEEE Transactions on Dependable and Secure Computing
Towards the hierarchical verification of reactive systems
Theoretical Computer Science - Logic, semantics and theory of programming
Automatic analysis of firewall and network intrusion detection system configurations
Proceedings of the 2004 ACM workshop on Formal methods in security engineering
On the computational complexity of qualitative coalitional games
Artificial Intelligence
KNOW Why your access was denied: regulating feedback for usable security
Proceedings of the 11th ACM conference on Computer and communications security
Journal of Functional Programming
A 10-Gbps full-AES crypto design with a twisted BDD S-box architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Case-factor diagrams for structured probabilistic modeling
UAI '04 Proceedings of the 20th conference on Uncertainty in artificial intelligence
Success-Driven Learning in ATPG for Preimage Computation
IEEE Design & Test
Conformant planning via symbolic model checking and heuristic search
Artificial Intelligence
TLDI '05 Proceedings of the 2005 ACM SIGPLAN international workshop on Types in languages design and implementation
Scalable error detection using boolean satisfiability
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
On the benefits of using functional transitions and Kronecker algebra
Performance Evaluation
Test Vector Embedding into Accumulator-Generated Sequences: A Linear-Time Solution
IEEE Transactions on Computers
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures
IEEE Transactions on Software Engineering
Efficient Relational Calculation for Software Analysis
IEEE Transactions on Software Engineering
Implicit and Exact Path Delay Fault Grading in Sequential Circuits
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Functions for Quality Transition Fault Tests
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 10 - Volume 11
Modeling Custom Digital Circuits for Test
Journal of Electronic Testing: Theory and Applications
From linear time to branching time
ACM Transactions on Computational Logic (TOCL)
Test set enhancement for quality transition faults using function-based methods
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
An effective and efficient ATPG-based combinational equivalence checker
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Rewriting-Based Techniques for Runtime Verification
Automated Software Engineering
Implicit data structures for logic and stochastic systems analysis
ACM SIGMETRICS Performance Evaluation Review
Verification and change-impact analysis of access-control policies
Proceedings of the 27th international conference on Software engineering
Combinatorics and algorithms for low-discrepancy, roundings of a real sequence
Theoretical Computer Science - Automata, languages and programming
Generating BDDs for symbolic model checking in CCS
Distributed Computing
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Context-sensitive program analysis as database queries
Proceedings of the twenty-fourth ACM SIGMOD-SIGACT-SIGART symposium on Principles of database systems
Proceedings of the 42nd annual Design Automation Conference
Efficient SAT solving: beyond supercubes
Proceedings of the 42nd annual Design Automation Conference
Towards scalable flow and context sensitive pointer analysis
Proceedings of the 42nd annual Design Automation Conference
Principles of Sequential-Equivalence Verification
IEEE Design & Test
Quasi-Exact BDD Minimization Using Relaxed Best-First Search
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Application of Wu's method to symbolic model checking
Proceedings of the 2005 international symposium on Symbolic and algebraic computation
Encyclopedia of Computer Science
Average Path Length of Binary Decision Diagrams
IEEE Transactions on Computers
A new component concept for fault trees
SCS '03 Proceedings of the 8th Australian workshop on Safety critical systems and software - Volume 33
Distributed Symbolic Model Checking for μ-Calculus
Formal Methods in System Design
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation
Journal of Electronic Testing: Theory and Applications
Incremental Design Debugging in a Logic Synthesis Environment
Journal of Electronic Testing: Theory and Applications
Code aware resource management
Proceedings of the 5th ACM international conference on Embedded software
Cutpoints for formal equivalence verification of embedded software
Proceedings of the 5th ACM international conference on Embedded software
An overview of embedded system design education at berkeley
ACM Transactions on Embedded Computing Systems (TECS)
Bridging the gap between fair simulation and trace inclusion
Information and Computation
Exploiting Vanishing Polynomials for Equivalence Veri.cation of Fixed-Size Arithmetic Datapaths
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Model Checking C Programs Using F-SOFT
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Quality Transition Fault Tests Suitable for Small Delay Defects
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Model-checking processes with data
Science of Computer Programming
An Extended Event Matching Approach in Content-based Pub/Sub Systems for EAI
EDOC '05 Proceedings of the Ninth IEEE International EDOC Enterprise Computing Conference
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
IEEE Transactions on Dependable and Secure Computing
On the influence of the variable ordering for algorithmic learning using OBDDs
Information and Computation
Equivalence checking between behavioral and RTL descriptions with virtual controllers and datapaths
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Functional test generation based on word-level SAT
Journal of Systems Architecture: the EUROMICRO Journal
DAG-aware circuit compression for formal verification
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Reducing cache misses by application-specific re-configurable indexing
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Integrating CNF and BDD based SAT solvers
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
BDD-based verification of scalable designs
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Mathematical framework for representing discrete functions as word-level polynomials
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
A comparison of BDDs, BMC, and sequential SAT for model checking
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
Formal Methods in System Design
Compositional SCC Analysis for Language Emptiness
Formal Methods in System Design
An anytime symmetry detection algorithm for ROBDDs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A transduction-based framework to synthesize RSFQ circuits
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A fast logic simulator using a look up table cascade emulator
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Controlling inductive cross-talk and power in off-chip buses using CODECs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Bounds on the OBDD-size of integer multiplication via universal hashing
Journal of Computer and System Sciences
SAT-based sequential depth computation
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Logic verification based on diagnosis techniques
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Algorithms for compacting error traces
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
An automatic interconnection rectification technique for SoC design integration
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A BDD-based fast heuristic algorithm for disjoint decomposition
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Synthesis of high performance low power PTL circuits
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Gate-level simulation of quantum circuits
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
K-disjointness paradigm with application to symmetry detection for incompletely specified functions
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Bridging fault testability of BDD circuits
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Supporting sequential assumptions in hybrid verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Detecting support-reducing bound sets using two-cofactor symmetries
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Tightly integrate dynamic verification with formal verification: a GSTE based approach
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
MUP: a minimal unsatisfiability prover
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
TED+: a data structure for microprocessor verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Lower bounds for dynamic BDD reordering
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Embedded system education: a new paradigm for engineering schools?
ACM SIGBED Review - Special issue: The first workshop on embedded system education (WESE)
Using heuristic search for finding deadlocks in concurrent systems
Information and Computation
Evaluation of Collapsing Methods for Fault Diagnosis
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
On finding the minimum test set of a BDD-based circuit
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Kauffman networks: analysis and applications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Analysis and synthesis of quantum circuits by using quantum decision diagrams
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Bus stuttering: an encoding technique to reduce inductive noise in off-chip data transmission
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Equivalence verification of arithmetic datapaths with multiple word-length operands
Proceedings of the conference on Design, automation and test in Europe: Proceedings
New methods and coverage metrics for functional verification
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Functional constraints vs. test compression in scan-based delay testing
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Disjunctive image computation for embedded software verification
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Effective static race detection for Java
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Relational programming with CrocoPat
Proceedings of the 28th international conference on Software engineering
A 3D 6-subiteration curve thinning algorithm based on P-simple points
Discrete Applied Mathematics - Special issue: IWCIA 2003 - Ninth international workshop on combinatorial image analysis
Conquering uncertainty in multiple-valued logic design
Artificial intelligence in logic design
Verifying the adaptation behavior of embedded systems
Proceedings of the 2006 international workshop on Self-adaptation and self-managing systems
Information Processing Letters
Building small equality graphs for deciding equality logic with uninterpreted functions
Information and Computation
Strong planning under partial observability
Artificial Intelligence
Efficient interactive configuration of unbounded modular systems
Proceedings of the 2006 ACM symposium on Applied computing
Logic and stochastic modeling with SMART
Performance Evaluation - Modelling techniques and tools for computer performance evaluation
On-line resources allocation for ATM networks with rerouting
Computers and Operations Research
Constructing efficient formal models from high-level descriptions using symbolic simulation
International Journal of Parallel Programming
Visibility enhancement for silicon debug
Proceedings of the 43rd annual Design Automation Conference
Distributed dynamic BDD reordering
Proceedings of the 43rd annual Design Automation Conference
MARS-C: modeling and reduction of soft errors in combinational circuits
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 43rd annual Design Automation Conference
Automatic invariant strengthening to prove properties in bounded model checking
Proceedings of the 43rd annual Design Automation Conference
An efficient estimation of the ROBDD's complexity
Integration, the VLSI Journal
Modeling component connectors in Reo by constraint automata
Science of Computer Programming - Special issue on second international workshop on foundations of coordination languages and software architectures (FOCLASA'03)
Proceedings of the 12th ACM SIGKDD international conference on Knowledge discovery and data mining
Logic synthesis for asynchronous circuits based on STG unfoldings and incremental SAT
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Tool support for checking railway interlocking designs
SCS '05 Proceedings of the 10th Australian workshop on Safety critical systems and software - Volume 55
Type-safe modular hash-consing
Proceedings of the 2006 workshop on ML
Model checking knowledge, strategies, and games in multi-agent systems
AAMAS '06 Proceedings of the fifth international joint conference on Autonomous agents and multiagent systems
Symbolic Techniques in Satisfiability Solving
Journal of Automated Reasoning
Lower bounds for restricted read-once parity branching programs
Theoretical Computer Science
Diagnostic modelling of digital systems with multi-level decision diagrams
MS'06 Proceedings of the 17th IASTED international conference on Modelling and simulation
Automatic generation of assumptions for modular verification of software specifications
Journal of Systems and Software - Special issue: Selected papers from the 4th source code analysis and manipulation (SCAM 2004) workshop
Boolean formulation for sensor allocation problem and its efficient solver
Proceedings of the international workshop on Middleware for sensor networks
Data structures for symbolic multi-valued model-checking
Formal Methods in System Design
Propositional Satisfiability and Constraint Programming: A comparative survey
ACM Computing Surveys (CSUR)
Efficient path conditions in dependence graphs for software safety analysis
ACM Transactions on Software Engineering and Methodology (TOSEM)
EPspectra: a formal toolkit for developing DSP software applications
Theory and Practice of Logic Programming
Secure function evaluation with ordered binary decision diagrams
Proceedings of the 13th ACM conference on Computer and communications security
Embedded software verification using symbolic execution and uninterpreted functions
International Journal of Parallel Programming
Combining symmetry reduction and under-approximation for symbolic model checking
Formal Methods in System Design
Formal Methods in System Design
A system for the static analysis of XPath
ACM Transactions on Information Systems (TOIS)
Deriving escape analysis by abstract interpretation
Higher-Order and Symbolic Computation
Analysis of Markov reward models using zero-suppressed multi-terminal BDDs
valuetools '06 Proceedings of the 1st international conference on Performance evaluation methodolgies and tools
Structured analysis techniques for large Markov chains
SMCtools '06 Proceeding from the 2006 workshop on Tools for solving structured Markov chains
A hierarchy result for read-once branching programs with restricted parity nondeterminism
Theoretical Computer Science - Mathematical foundations of computer science 2000
Joeq: a virtual machine and compiler infrastructure
Science of Computer Programming - Special issue on advances in interpreters, virtual machines and emulators (IVME'03)
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Theoretical Computer Science
Thorough static analysis of device drivers
Proceedings of the 1st ACM SIGOPS/EuroSys European Conference on Computer Systems 2006
Function memoization and unique object representation for ACL2 functions
ACL2 '06 Proceedings of the sixth international workshop on the ACL2 theorem prover and its applications
A constraint solver for model-based engineering
AI Communications
Thue Specifications, Infinite Graphs and Synchronized Product
Fundamenta Informaticae
Approximating Boolean functions by OBDDs
Discrete Applied Mathematics
The octahedron abstract domain
Science of Computer Programming
Computer Networks: The International Journal of Computer and Telecommunications Networking
Algorithmic Verification of Noninterference Properties
Electronic Notes in Theoretical Computer Science (ENTCS)
AND/OR search spaces for graphical models
Artificial Intelligence
Detecting State Encoding Conflicts in STG Unfoldings Using SAT
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Combinational equivalence checking for threshold logic circuits
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Synthesis of irregular combinational functions with large don't care sets
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Optimization techniques for BDD-based bisimulation computation
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Improvements for constraint solving in the systemc verification library
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Disjunctive image computation for software verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Comparing BDD and SAT Based Techniques for Model Checking Chaum's Dining Cryptographers Protocol
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
Providing a formal linkage between MDG and HOL
Formal Methods in System Design
Bounded model checking of infinite state systems
Formal Methods in System Design
Binary Decision Diagrams and neural networks
The Journal of Supercomputing
Saturn: A scalable framework for error detection using Boolean satisfiability
ACM Transactions on Programming Languages and Systems (TOPLAS) - Special issue on POPL 2005
On bounding the delay of a critical path
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
An efficient technique for synthesis and optimization of polynomials in GF(2m)
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Decomposing image computation for symbolic reachability analysis using control flow information
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Improvements to combinational equivalence checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Journal of Embedded Computing - Real-Time and Embedded Computing Systems
Better upper bounds on the QOBDD size of integer multiplication
Discrete Applied Mathematics
Design space exploration of reliable networked embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
A tool for automated iptables firewall analysis
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
Implementing Relational Specifications in a Constraint Functional Logic Language
Electronic Notes in Theoretical Computer Science (ENTCS)
Saturation for a General Class of Models
IEEE Transactions on Software Engineering
The ant and the grasshopper: fast and accurate pointer analysis for millions of lines of code
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Efficient static analysis of XML paths and types
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
IEEE Intelligent Systems
Numerical Function Generators Using LUT Cascades
IEEE Transactions on Computers
Interactive presentation: Reliability-aware system synthesis
Proceedings of the conference on Design, automation and test in Europe
Estimating functional coverage in bounded model checking
Proceedings of the conference on Design, automation and test in Europe
A domain-specific language for regular sets of strings and trees
DSL'97 Proceedings of the Conference on Domain-Specific Languages on Conference on Domain-Specific Languages (DSL), 1997
Symbolic Model Checking for Channel-based Component Connectors
Electronic Notes in Theoretical Computer Science (ENTCS)
Deciding XPath containment with MSO
Data & Knowledge Engineering
A Graph-Based Unified Technique for Computing and Representing Coefficients over Finite Fields
IEEE Transactions on Computers
IEEE Transactions on Computers
Exploiting interleaving semantics in symbolic state-space generation
Formal Methods in System Design
Partition search for non-binary constraint satisfaction
Information Sciences: an International Journal
Distributing the Workload in a Lazy Theorem-Prover
Electronic Notes in Theoretical Computer Science (ENTCS)
The trace partitioning abstract domain
ACM Transactions on Programming Languages and Systems (TOPLAS) - Special Issue ESOP'05
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
A Technique for Estimating Signal Activity in Logic Circuits
Integrated Computer-Aided Engineering
Power Estimation Under User-Specified Input Sequences and Programs
Integrated Computer-Aided Engineering
Probabilistic abstraction for model checking: An approach based on property testing
ACM Transactions on Computational Logic (TOCL)
DDBDD: delay-driven BDD synthesis for FPGAs
Proceedings of the 44th annual Design Automation Conference
Symbolic model checking of institutions
Proceedings of the ninth international conference on Electronic commerce
ProgME: towards programmable network measurement
Proceedings of the 2007 conference on Applications, technologies, architectures, and protocols for computer communications
Visualizing SAT Instances and Runs of the DPLL Algorithm
Journal of Automated Reasoning
Proceedings of the the 6th joint meeting of the European software engineering conference and the ACM SIGSOFT symposium on The foundations of software engineering
Boosting interpolation with dynamic localized abstraction and redundancy removal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Probabilistic transfer matrices in symbolic reliability analysis of logic circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Case-factor diagrams for structured probabilistic modeling
Journal of Computer and System Sciences
IEEE Transactions on Computers
Path queries on compressed XML
VLDB '03 Proceedings of the 29th international conference on Very large data bases - Volume 29
Functional Constraints vs. Test Compression in Scan-Based Delay Testing
Journal of Electronic Testing: Theory and Applications
Conditional independence and chain event graphs
Artificial Intelligence
Optimality and condensing of information flow through linear refinement
Theoretical Computer Science
Symbolic model checking for temporal-epistemic logics
ACM SIGACT News
Checking equivalence of quantum circuits and states
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
An incremental learning framework for estimating signal controllability in unit-level verification
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Stimulus generation for constrained random simulation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Probabilistic decision diagrams for exact probabilistic analysis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Computation of minimal counterexamples by using black box techniques and symbolic methods
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
State-set branching: Leveraging BDDs for heuristic search
Artificial Intelligence
Compressing probabilistic Prolog programs
Machine Learning
Displacement BDD and geometric transformations of binary decision diagram encoded images
Pattern Recognition Letters
Applicability of feed-forward and recurrent neural networks to Boolean function complexity modeling
Expert Systems with Applications: An International Journal
SAT-based ATPG using multilevel compatible don't-cares
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 2nd international conference on Performance evaluation methodologies and tools
Information Assurance: Dependability and Security in Networked Systems
Information Assurance: Dependability and Security in Networked Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Formal methods for the analysis and synthesis of nanometer-scale cellular arrays
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Hang analysis: fighting responsiveness bugs
Proceedings of the 3rd ACM SIGOPS/EuroSys European Conference on Computer Systems 2008
Artificial Intelligence
On the Use of ZBDDs for Implicit and Compact Critical Path Delay Fault Test Generation
Journal of Electronic Testing: Theory and Applications
A Methodology for Handling Complex Functional Constraints for Large Industrial Designs
Journal of Electronic Testing: Theory and Applications
Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Reachability analysis using multiway decision graphs in the HOL theorem prover
Proceedings of the 2008 ACM symposium on Applied computing
Formal verification of ASMs using MDGs
Journal of Systems Architecture: the EUROMICRO Journal
Boolean function complexity and neural networks
NN'06 Proceedings of the 7th WSEAS International Conference on Neural Networks
A Contribution to the Use of Decision Diagrams for Loading and Mining Transaction Databases
Fundamenta Informaticae - Special issue ISMIS'05
Bounded Model Checking for the Existential Fragment of TCTL_{-G} and Diagonal Timed Automata
Fundamenta Informaticae
Verification of the TESLA protocol in MCMAS-X
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Exact combinational logic synthesis and non-standard circuit design
Proceedings of the 5th conference on Computing frontiers
Symbolic mining of temporal specifications
Proceedings of the 30th international conference on Software engineering
Calysto: scalable and precise extended static checking
Proceedings of the 30th international conference on Software engineering
Binary decision diagrams: a mathematical model for the path-related objective functions
SMO'06 Proceedings of the 6th WSEAS International Conference on Simulation, Modelling and Optimization
Symbolic OBDD representations for mechanical assembly sequences
Computer-Aided Design
Automatic analysis of firewall and network intrusion detection system configurations
Journal of Computer Security - Formal Methods in Security Engineering Workshop (FMSE 04)
Automatic symbolic compositional verification by learning assumptions
Formal Methods in System Design
Stream firewalling of xml constraints
Proceedings of the 2008 ACM SIGMOD international conference on Management of data
Types for atomicity: Static checking and inference for Java
ACM Transactions on Programming Languages and Systems (TOPLAS)
AusDM '07 Proceedings of the sixth Australasian conference on Data mining and analytics - Volume 70
Checking Equivalence for Reo Networks
Electronic Notes in Theoretical Computer Science (ENTCS)
Dynamic inference of likely data preconditions over predicates by tree learning
ISSTA '08 Proceedings of the 2008 international symposium on Software testing and analysis
Gröbner-free normal forms for boolean polynomials
Proceedings of the twenty-first international symposium on Symbolic and algebraic computation
Functionally linear decomposition and synthesis of logic circuits for FPGAs
Proceedings of the 45th annual Design Automation Conference
Compositional verification of retiming and sequential optimizations
Proceedings of the 45th annual Design Automation Conference
Signature based Boolean matching in the presence of don't cares
Proceedings of the 45th annual Design Automation Conference
On the construction of small fully testable circuits with low depth
Microprocessors & Microsystems
Redundancy-free residual dispatch: using ordered binary decision diagrams for efficient dispatch
Proceedings of the 7th workshop on Foundations of aspect-oriented languages
Implementing semantic merging operators using binary decision diagrams
International Journal of Approximate Reasoning
Finding reliable subgraphs from large probabilistic graphs
Data Mining and Knowledge Discovery
Symbolic reliability analysis and optimization of ECU networks
Proceedings of the conference on Design, automation and test in Europe
Quantified synthesis of reversible logic
Proceedings of the conference on Design, automation and test in Europe
Specification and design considerations for reliable embedded systems
Proceedings of the conference on Design, automation and test in Europe
Comparison of Boolean satisfiability encodings on FPGA detailed routing problems
Proceedings of the conference on Design, automation and test in Europe
On analysis and synthesis of (n, k)-non-linear feedback shift registers
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Efficient SAT-based bounded model checking for software verification
Theoretical Computer Science
Compiling mappings to bridge applications and databases
ACM Transactions on Database Systems (TODS)
A Symbolic Model Checking Framework for Safety Analysis, Diagnosis, and Synthesis
Model Checking and Artificial Intelligence
Multi-state Directed Acyclic Graphs
CAI '07 Proceedings of the 20th conference of the Canadian Society for Computational Studies of Intelligence on Advances in Artificial Intelligence
Cost-Bounded Binary Decision Diagrams for 0-1 Programming
CPAIOR '07 Proceedings of the 4th international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Bounded Model Checking with Description Logic Reasoning
TABLEAUX '07 Proceedings of the 16th international conference on Automated Reasoning with Analytic Tableaux and Related Methods
A Top Down Interpreter for LPAD and CP-Logic
AI*IA '07 Proceedings of the 10th Congress of the Italian Association for Artificial Intelligence on AI*IA 2007: Artificial Intelligence and Human-Oriented Computing
The Beginning of Model Checking: A Personal Perspective
25 Years of Model Checking
25 Years of Model Checking
A View from the Engine Room: Computational Support for Symbolic Model Checking
25 Years of Model Checking
25 Years of Model Checking
Program Repair Suggestions from Graphical State-Transition Specifications
FORTE '08 Proceedings of the 28th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
A Symbolic Algorithm for the Synthesis of Bounded Petri Nets
PETRI NETS '08 Proceedings of the 29th international conference on Applications and Theory of Petri Nets
Hierarchical Set Decision Diagrams and Automatic Saturation
PETRI NETS '08 Proceedings of the 29th international conference on Applications and Theory of Petri Nets
AND/OR Multi-valued Decision Diagrams for Constraint Networks
Concurrency, Graphs and Models
Theorem Proving for Verification (Invited Tutorial)
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Transitive q-Ary Functions over Finite Fields or Finite Sets: Counts, Properties and Applications
WAIFI '08 Proceedings of the 2nd international workshop on Arithmetic of Finite Fields
Tutorial on Model Checking: Modelling and Verification in Computer Science
AB '08 Proceedings of the 3rd international conference on Algebraic Biology
Symbolic Reachability for Process Algebras with Recursive Data Types
Proceedings of the 5th international colloquium on Theoretical Aspects of Computing
A New Approach for the Construction of Multiway Decision Graphs
Proceedings of the 5th international colloquium on Theoretical Aspects of Computing
A Practical DPA Countermeasure with BDD Architecture
CARDIS '08 Proceedings of the 8th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Improved BDD Algorithms for the Simulation of Quantum Circuits
ESA '08 Proceedings of the 16th annual European symposium on Algorithms
Deciding Effectively Propositional Logic Using DPLL and Substitution Sets
IJCAR '08 Proceedings of the 4th international joint conference on Automated Reasoning
Approximate Compilation of Constraints into Multivalued Decision Diagrams
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
Maintaining Generalized Arc Consistency on Ad Hoc r-Ary Constraints
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
Parameter Learning in Probabilistic Databases: A Least Squares Approach
ECML PKDD '08 Proceedings of the 2008 European Conference on Machine Learning and Knowledge Discovery in Databases - Part I
A Simple Model for Sequences of Relational State Descriptions
ECML PKDD '08 Proceedings of the European conference on Machine Learning and Knowledge Discovery in Databases - Part II
Symbolic Reliability Analysis of Self-healing Networked Embedded Systems
SAFECOMP '08 Proceedings of the 27th international conference on Computer Safety, Reliability, and Security
Z2SAL - Building a Model Checker for Z
ABZ '08 Proceedings of the 1st international conference on Abstract State Machines, B and Z
Symbolic Classification of General Two-Player Games
KI '08 Proceedings of the 31st annual German conference on Advances in Artificial Intelligence
Using OBDDs for Efficient Query Evaluation on Probabilistic Databases
SUM '08 Proceedings of the 2nd international conference on Scalable Uncertainty Management
Model Construction with External Constraints: An Interactive Journey from Semantics to Syntax
MoDELS '08 Proceedings of the 11th international conference on Model Driven Engineering Languages and Systems
Efficient compilation techniques for large scale feature models
GPCE '08 Proceedings of the 7th international conference on Generative programming and component engineering
SPaC: a symbolic pareto calculator
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Symbolic voter placement for dependability-aware system synthesis
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Javert: fully automatic mining of general temporal properties from dynamic traces
Proceedings of the 16th ACM SIGSOFT International Symposium on Foundations of software engineering
Conditioning probabilistic databases
Proceedings of the VLDB Endowment
Visualizing potential parallelism in sequential programs
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
The symbolic OBDD scheme for generating mechanical assembly sequences
Formal Methods in System Design
Model checking sequential software programs via mixed symbolic analysis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A note on the size of OBDDs for the graph of integer multiplication
Information Processing Letters
Using formal specifications to support testing
ACM Computing Surveys (CSUR)
Shared Ordered Binary Decision Diagrams for Dempster-Shafer Theory
ECSQARU '07 Proceedings of the 9th European Conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
Representation of graphs by OBDDs
Discrete Applied Mathematics
Trust and Automation in Verification Tools
ATVA '08 Proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis
Applying a Grouping Operator in Model Transformations
Applications of Graph Transformations with Industrial Relevance
Hiding a Needle in a Haystack Using Negative Databases
Information Hiding
A New Algorithm for Partitioned Symbolic Reachability Analysis
Electronic Notes in Theoretical Computer Science (ENTCS)
Semi-sparse flow-sensitive pointer analysis
Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
MICAI '08 Proceedings of the 7th Mexican International Conference on Artificial Intelligence: Advances in Artificial Intelligence
A Unified Model Checking Approach with Projection Temporal Logic
ICFEM '08 Proceedings of the 10th International Conference on Formal Methods and Software Engineering
Self-Organization for Fault-Tolerance
IWSOS '08 Proceedings of the 3rd International Workshop on Self-Organizing Systems
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
Revising Distributed UNITY Programs Is NP-Complete
OPODIS '08 Proceedings of the 12th International Conference on Principles of Distributed Systems
Improved Binary Space Partition merging
Computer-Aided Design
On the Efficient Execution of ProbLog Programs
ICLP '08 Proceedings of the 24th International Conference on Logic Programming
Counterexample Generation for Discrete-Time Markov Chains Using Bounded Model Checking
VMCAI '09 Proceedings of the 10th International Conference on Verification, Model Checking, and Abstract Interpretation
A Computational Scheme Based on Random Boolean Networks
Transactions on Computational Systems Biology X
From Philosophical to Industrial Logics
ICLA '09 Proceedings of the 3rd Indian Conference on Logic and Its Applications
A Unified Framework for Certificate and Compilation for QBF
ICLA '09 Proceedings of the 3rd Indian Conference on Logic and Its Applications
On the OBDD Complexity of Threshold Functions and the Variable Ordering Problem
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
Symbolic State-Space Generation of Asynchronous Systems Using Extensible Decision Diagrams
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
Symbolic Reachability Analysis of Integer Timed Petri Nets
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Automated abstraction by incremental refinement in interpolant-based model checking
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Dependent latch identification in the reachable state space
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Proceedings of the 3rd International Conference on Bio-Inspired Models of Network, Information and Computing Sytems
Program transformations using temporal logic side conditions
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal verification of hardware support for advanced encryption standard
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Model checking nash equilibria in MAD distributed systems
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Combining predicate and numeric abstraction for software model checking
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Symbolic program analysis using term rewriting and generalization
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
On the size of (generalized) OBDDs for threshold functions
Information Processing Letters
A direct construction of polynomial-size OBDD proof of pigeon hole problem
Information Processing Letters
Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
An XQDD-Based Verification Method for Quantum Circuits
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Arithmetic Circuit Verification Based on Symbolic Computer Algebra
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
XML Framework for Various Types of Decision Diagrams for Discrete Functions
IEICE - Transactions on Information and Systems
Approximate transient analysis of large stochastic models with WinPEPSY-QNS
Computer Networks: The International Journal of Computer and Telecommunications Networking
The synergy of precise and fast abstractions for program verification
Proceedings of the 2009 ACM symposium on Applied Computing
A Parallel Branching Program Machine for Emulation of Sequential Circuits
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Using model checking for critiquing based on clinical guidelines
Artificial Intelligence in Medicine
Robust window-based multi-node technology-independent logic minimization
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Enhancing bug hunting using high-level symbolic simulation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Does My Service Have Partners?
Transactions on Petri Nets and Other Models of Concurrency II
Hierarchical Set Decision Diagrams and Regular Models
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Larger Lower Bounds on the OBDD Complexity of Integer Multiplication
LATA '09 Proceedings of the 3rd International Conference on Language and Automata Theory and Applications
Boolean satisfiability from theoretical hardness to practical success
Communications of the ACM - A Blind Person's Interaction with Technology
Functional test generation using design and property decomposition techniques
ACM Transactions on Embedded Computing Systems (TECS)
PolyBoRi: A framework for Gröbner-basis computations with Boolean polynomials
Journal of Symbolic Computation
Symbolic model checking for channel-based component connectors
Science of Computer Programming
Journal of Computer Science and Technology
Novel probabilistic combinational equivalence checking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automatic constraint based test generation for behavioral HDL models
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
EURASIP Journal on Bioinformatics and Systems Biology - Special issue on network structure and biological function: Reconstruction, modelling, and statistical approaches
Verification Techniques for System-Level Design
Verification Techniques for System-Level Design
Handling Large Formal Context Using BDD --- Perspectives and Limitations
ICFCA '09 Proceedings of the 7th International Conference on Formal Concept Analysis
Evaluation of Different BDD Libraries to Extract Concepts in FCA --- Perspectives and Limitations
ICCS '09 Proceedings of the 9th International Conference on Computational Science: Part I
Maintaining Generalized Arc Consistency on Ad-hoc n-ary Boolean Constraints
Proceedings of the 2006 conference on ECAI 2006: 17th European Conference on Artificial Intelligence August 29 -- September 1, 2006, Riva del Garda, Italy
Fast Set Bounds Propagation using BDDs
Proceedings of the 2008 conference on ECAI 2008: 18th European Conference on Artificial Intelligence
A BDD Approach to the Feature Subscription Problem
Proceedings of the 2008 conference on ECAI 2008: 18th European Conference on Artificial Intelligence
Compressing Binary Decision Diagrams
Proceedings of the 2008 conference on ECAI 2008: 18th European Conference on Artificial Intelligence
Symbolic Classification of General Multi-Player Games
Proceedings of the 2008 conference on ECAI 2008: 18th European Conference on Artificial Intelligence
Synthesis and Composition of Web Services
Formal Methods for Web Services
HS-ROBDD: an efficient variable order binary decision diagram
Proceedings of the 11th Annual Conference Companion on Genetic and Evolutionary Computation Conference: Late Breaking Papers
Proceedings of the eighteenth international symposium on Software testing and analysis
Model Checking Techniques for Test Generation from Business Process Models
Ada-Europe '09 Proceedings of the 14th Ada-Europe International Conference on Reliable Software Technologies
DSSZ-MC --- A Tool for Symbolic Analysis of Extended Petri Nets
PETRI NETS '09 Proceedings of the 30th International Conference on Applications and Theory of Petri Nets
Weighted A∗ search -- unifying view and application
Artificial Intelligence
ACM Computing Surveys (CSUR)
LCF-style Platform based on Multiway Decision Graphs
Electronic Notes in Theoretical Computer Science (ENTCS)
Issues in using model checkers for test case generation
Journal of Systems and Software
Model checking temporal logics of knowledge in distributed systems
AAAI'04 Proceedings of the 19th national conference on Artifical intelligence
Abstract branching for quantified formulas
AAAI'06 Proceedings of the 21st national conference on Artificial intelligence - Volume 1
A BDD-based polytime algorithm for cost-bounded interactive configuration
AAAI'06 Proceedings of the 21st national conference on Artificial intelligence - Volume 1
An abstract reachability approach by combining HOL induction and multiway decision graphs
Journal of Computer Science and Technology
Design and implementation of S-MARKS: A secure middleware for pervasive computing applications
Journal of Systems and Software
Semantic analysis of program initialisation in genetic programming
Genetic Programming and Evolvable Machines
An Automata-Theoretic Approach to Regular XPath
DBPL '09 Proceedings of the 12th International Symposium on Database Programming Languages
A Reduction of Logical Regulatory Graphs Preserving Essential Dynamical Properties
CMSB '09 Proceedings of the 7th International Conference on Computational Methods in Systems Biology
Set Algebra for Service Behavior: Applications and Constructions
BPM '09 Proceedings of the 7th International Conference on Business Process Management
Observation-based model for BDI-agents
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
Propositional fragments for knowledge compilation and quantified boolean formulae
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
On compiling system models for faster and more scalable diagnosis
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
Search space reduction and Russian Doll search
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
Compressing configuration data for memory limited devices
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
Interactive configuration with regular string constraints
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
A spectrum of symbolic on-line diagnosis approaches
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
Knowledge compilation properties of tree-of-BDDs
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
New compilation languages based on structured decomposability
AAAI'08 Proceedings of the 23rd national conference on Artificial intelligence - Volume 1
Terminological reasoning in SHIQ with ordered binary decision diagrams
AAAI'08 Proceedings of the 23rd national conference on Artificial intelligence - Volume 1
OBDD-based universal planning for synchronized agents in non-deterministic domains
Journal of Artificial Intelligence Research
Conformant planning via symbolic model checking
Journal of Artificial Intelligence Research
Learning to order BDD variables in verification
Journal of Artificial Intelligence Research
Answer set planning under action costs
Journal of Artificial Intelligence Research
Generalizing Boolean satisfiability I: background and survey of existing work
Journal of Artificial Intelligence Research
Solving set constraint satisfaction problems using ROBDDs
Journal of Artificial Intelligence Research
Planning graph heuristics for belief space search
Journal of Artificial Intelligence Research
Closed-loop learning of visual control policies
Journal of Artificial Intelligence Research
Journal of Artificial Intelligence Research
First order decision diagrams for relational MDPs
Journal of Artificial Intelligence Research
AND/OR multi-valued decision diagrams (AOMDDs) for graphical models
Journal of Artificial Intelligence Research
Journal of Artificial Intelligence Research
Using Walk-SAT and Rel-SAT for cryptographic key search
IJCAI'99 Proceedings of the 16th international joint conference on Artifical intelligence - Volume 1
Techniques for efficient interactive configuration of distribution networks
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
Constraint and variable ordering heuristics for compiling configuration problems
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
Hierarchical diagnosis of multiple faults
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
First order decision diagrams for relational MDPs
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
Planning for gene regulatory network intervention
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
ProbLog: a probabilistic prolog and its application in link discovery
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
Compiling Bayesian networks by symbolic probability calculation based on zero-suppressed BDDs
IJCAI'07 Proceedings of the 20th international joint conference on Artifical intelligence
A fast computerized method for automatic simplification of boolean functions
ISTASC'09 Proceedings of the 9th WSEAS International Conference on Systems Theory and Scientific Computation
Symbolic state traversal for WCET analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Resurrecting infeasible clock-gating functions
Proceedings of the 46th Annual Design Automation Conference
Computing bounds for fault tolerance using formal techniques
Proceedings of the 46th Annual Design Automation Conference
BDD-based synthesis of reversible logic for large functions
Proceedings of the 46th Annual Design Automation Conference
The day Sherlock Holmes decided to do EDA
Proceedings of the 46th Annual Design Automation Conference
Formal verification of diagnosability via symbolic model checking
IJCAI'03 Proceedings of the 18th international joint conference on Artificial intelligence
A logically complete reasoning maintenance system based on a logical constraint solver
IJCAI'91 Proceedings of the 12th international joint conference on Artificial intelligence - Volume 1
User control and direction of a more efficient simplifier in ACL2
Proceedings of the Eighth International Workshop on the ACL2 Theorem Prover and its Applications
Uncovering functional dependencies in MDD-compiled product catalogues
Proceedings of the third ACM conference on Recommender systems
A perspective on knowledge compilation
IJCAI'01 Proceedings of the 17th international joint conference on Artificial intelligence - Volume 1
Extracting certificates from quantified boolean formulas
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
DPLL with a trace: from SAT to knowledge compilation
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
Bounded search and symbolic inference for constraint optimization
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
Decision diagrams for the computation of semiring valuations
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
Oblivious decision trees graphs and top down pruning
IJCAI'95 Proceedings of the 14th international joint conference on Artificial intelligence - Volume 2
SAT-Solving in Practice, with a Tutorial Example from Supervisory Control
Discrete Event Dynamic Systems
Automating the addition of fault tolerance with discrete controller synthesis
Formal Methods in System Design
Strong planning under partial observability
Artificial Intelligence
NetPiler: detection of ineffective router configurations
IEEE Journal on Selected Areas in Communications - Special issue on network infrastructure configuration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Evaluating abductive hypotheses using an EM algorithm on BDDs
IJCAI'09 Proceedings of the 21st international jont conference on Artifical intelligence
Optimal symbolic planning with action costs and preferences
IJCAI'09 Proceedings of the 21st international jont conference on Artifical intelligence
Building Efficient Model Checkers using Hierarchical Set Decision Diagrams and Automatic Saturation
Fundamenta Informaticae - Petri Nets 2008
Computation of signal output probability for Boolean functions represented by OBDD
Computers & Mathematics with Applications
Dependent-latch identification in reachable state space
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams
Journal of Electronic Testing: Theory and Applications
DynaTune: circuit-level optimization for timing speculation considering dynamic path behavior
Proceedings of the 2009 International Conference on Computer-Aided Design
Semantically driven mutation in genetic programming
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Symbolic CTL Model Checking of Asynchronous Systems Using Constrained Saturation
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
Query Evaluation on Probabilistic RDF Databases
WISE '09 Proceedings of the 10th International Conference on Web Information Systems Engineering
TABLEAUX '09 Proceedings of the 18th International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
Model Checking Coalition Nash Equilibria in MAD Distributed Systems
SSS '09 Proceedings of the 11th International Symposium on Stabilization, Safety, and Security of Distributed Systems
Bounded Semantics of CTL and SAT-Based Verification
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Modeling Service Level Agreements with Binary Decision Diagrams
ICSOC-ServiceWave '09 Proceedings of the 7th International Joint Conference on Service-Oriented Computing
Symbolic OBDD-Based Reachability Analysis Needs Exponential Space
SOFSEM '10 Proceedings of the 36th Conference on Current Trends in Theory and Practice of Computer Science
A 3D 6-subiteration curve thinning algorithm based on P-simple points
Discrete Applied Mathematics - Special issue: IWCIA 2003 - Ninth international workshop on combinatorial image analysis
BDDs-design, analysis, complexity, and applications
Discrete Applied Mathematics
Finite-state verification of the ebXML protocol
Electronic Commerce Research and Applications
Safety Property Verification of Cyclic Synchronous Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
Gödel-Dummett Counter-models through Matrix Computation
Electronic Notes in Theoretical Computer Science (ENTCS)
A New Approach to Upward-Closed Set Backward Reachability Analysis
Electronic Notes in Theoretical Computer Science (ENTCS)
SAT-based Induction for Temporal Safety Properties
Electronic Notes in Theoretical Computer Science (ENTCS)
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
An Incremental Algorithm to Check Satisfiability for Bounded Model Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
Monitoring Algorithms for Metric Temporal Logic Specifications
Electronic Notes in Theoretical Computer Science (ENTCS)
Explicit-Symbolic Modelling for Formal Verification
Electronic Notes in Theoretical Computer Science (ENTCS)
Automatic Verification of Safety Rules for a Subway Control Software
Electronic Notes in Theoretical Computer Science (ENTCS)
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Probabilistic Verification and Approximation
Electronic Notes in Theoretical Computer Science (ENTCS)
Syntax-driven Behavior Partitioning for Model-checking of Esterel Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Electronic Notes in Theoretical Computer Science (ENTCS)
Symbolic Reasoning with Weighted and Normalized Decision Diagrams
Electronic Notes in Theoretical Computer Science (ENTCS)
A termination analyzer for Java bytecode based on path-length
ACM Transactions on Programming Languages and Systems (TOPLAS)
On the influence of the variable ordering for algorithmic learning using OBDDs
Information and Computation
Bridging the gap between fair simulation and trace inclusion
Information and Computation
Using heuristic search for finding deadlocks in concurrent systems
Information and Computation
Building small equality graphs for deciding equality logic with uninterpreted functions
Information and Computation
Automated composition of Web services via planning in asynchronous domains
Artificial Intelligence
Information Processing Letters
A BDD-based verification method for large synthesized circuits
Integration, the VLSI Journal
An efficient estimation of the ROBDD's complexity
Integration, the VLSI Journal
Learning probabilistic decision graphs
International Journal of Approximate Reasoning
Formal Methods in System Design
A simple universal generating function method to search for all minimal paths in networks
IEEE Transactions on Systems, Man, and Cybernetics, Part A: Systems and Humans
FSM Encoding for BDD Representations
International Journal of Applied Mathematics and Computer Science
Santa Claus: Formal analysis of a process-oriented solution
ACM Transactions on Programming Languages and Systems (TOPLAS)
Computer Vision and Image Understanding
Deciding Effectively Propositional Logic Using DPLL and Substitution Sets
Journal of Automated Reasoning
The computational complexity of equivalence and isomorphism problems
The computational complexity of equivalence and isomorphism problems
Beyond soundness: on the verification of semantic business process models
Distributed and Parallel Databases
WYSINWYX: What you see is not what you eXecute
ACM Transactions on Programming Languages and Systems (TOPLAS)
Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
Electronic Notes in Theoretical Computer Science (ENTCS)
Decision-making coordination and efficient reasoning techniques for feature-based configuration
Science of Computer Programming
SAT-based analysis of feature models is easy
Proceedings of the 13th International Software Product Line Conference
Efficient symbolic state-space construction for asynchronous systems
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
Validation of multiagent systems by symbolic model checking
AOSE'02 Proceedings of the 3rd international conference on Agent-oriented software engineering III
A framework for quasi-exact optimization using relaxed best-first search
KI'06 Proceedings of the 29th annual German conference on Artificial intelligence
Challenges for formal verification in industrial setting
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
An easy-to-use, efficient tool-chain to analyze the availability of telecommunication equipment
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
SAT-based verification of LTL formulas
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
RECOMB'07 Proceedings of the 11th annual international conference on Research in computational molecular biology
ICATPN'03 Proceedings of the 24th international conference on Applications and theory of Petri nets
XML schema containment checking based on semi-implicit techniques
CIAA'03 Proceedings of the 8th international conference on Implementation and application of automata
TCC'07 Proceedings of the 4th conference on Theory of cryptography
Modelling of complex systems given as a mealy machine with linear decision diagrams
ICCS'03 Proceedings of the 2003 international conference on Computational science: PartII
Symbolic archive representation for a fast nondominance test
EMO'07 Proceedings of the 4th international conference on Evolutionary multi-criterion optimization
Automata-theoretic model checking revisited
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
A symbolic algorithm for optimal Markov chain lumping
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
"Don't care" modeling: a logical framework for developing predictive system models
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Combining abstraction refinement and SAT-based model checking
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
The weakness of self-complementation
STACS'99 Proceedings of the 16th annual conference on Theoretical aspects of computer science
On the size of randomized OBDDs and read-once branching programs for k-stable functions
STACS'99 Proceedings of the 16th annual conference on Theoretical aspects of computer science
Equational binary decision diagrams
LPAR'00 Proceedings of the 7th international conference on Logic for programming and automated reasoning
Experimental analysis of different techniques for bounded model checking
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
A SAT characterization of boolean-program correctness
SPIN'03 Proceedings of the 10th international conference on Model checking software
Tackling large state spaces in performance modelling
SFM'07 Proceedings of the 7th international conference on Formal methods for performance evaluation
Data representation and efficient solution: a decision diagram approach
SFM'07 Proceedings of the 7th international conference on Formal methods for performance evaluation
Automatic verification of a turbogas control system with the murϕ verifier
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
A short survey of automated reasoning
AB'07 Proceedings of the 2nd international conference on Algebraic biology
Improving static variable orders via invariants
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Behaviour-preserving transition insertions in unfolding prefixes
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Combining decomposition and unfolding for STG synthesis
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Operating guidelines for finite-state services
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
The ComBack method: extending hash compaction with backtracking
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
A microcanonical optimization algorithm for BDD minimization problem
IEA/AIE'07 Proceedings of the 20th international conference on Industrial, engineering, and other applications of applied intelligent systems
Using counterexamples for improving the precision of reachability computation with polyhedra
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Structural abstraction of software verification conditions
CAV'07 Proceedings of the 19th international conference on Computer aided verification
A lazy and layered SMT(BV) solver for hard industrial verification problems
CAV'07 Proceedings of the 19th international conference on Computer aided verification
SAT-based summarization for Boolean programs
Proceedings of the 14th international SPIN conference on Model checking software
Proceedings of the 14th international SPIN conference on Model checking software
A constraint store based on multivalued decision diagrams
CP'07 Proceedings of the 13th international conference on Principles and practice of constraint programming
AND/OR multi-valued decision diagrams for constraint optimization
CP'07 Proceedings of the 13th international conference on Principles and practice of constraint programming
Large program trace analysis and compression with ZDDs
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Information loss in knowledge compilation: A comparison of Boolean envelopes
Artificial Intelligence
Model checking with SAT-based characterization of ACTL formulas
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Optimizing inference in Bayesian networks and semiring valuation algebras
MICAI'07 Proceedings of the artificial intelligence 6th Mexican international conference on Advances in artificial intelligence
Frequent pattern mining and knowledge indexing based on zero-suppressed BDDs
KDID'06 Proceedings of the 5th international conference on Knowledge discovery in inductive databases
On the symbolic computation of the hardest configurations of the RUSH HOUR game
CG'06 Proceedings of the 5th international conference on Computers and games
A logic programming framework for combinational circuit synthesis
ICLP'07 Proceedings of the 23rd international conference on Logic programming
Symbolic model checking temporal logics of knowledge in multi-agent system via extended Mu-calculus
LSMS'07 Proceedings of the Life system modeling and simulation 2007 international conference on Bio-Inspired computational intelligence and applications
A theoretical study on variable ordering of zero-suppressed BDDs for representing frequent itemsets
DS'07 Proceedings of the 10th international conference on Discovery science
On threshold BDDs and the optimal variable ordering problem
COCOA'07 Proceedings of the 1st international conference on Combinatorial optimization and applications
Faster SPDL model checking through property-driven state space generation
EPEW'07 Proceedings of the 4th European performance engineering conference on Formal methods and stochastic models for performance evaluation
Decision diagrams for the representation and analysis of logical models of genetic networks
CMSB'07 Proceedings of the 2007 international conference on Computational methods in systems biology
Program analysis using weighted pushdown systems
FSTTCS'07 Proceedings of the 27th international conference on Foundations of software technology and theoretical computer science
Dynamically resizable binary decision diagrams
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Efficient reasoning for nogoods in constraint solvers with BDDs
PADL'08 Proceedings of the 10th international conference on Practical aspects of declarative languages
Exact OBDD bounds for some fundamental functions
SOFSEM'08 Proceedings of the 34th conference on Current trends in theory and practice of computer science
PAKDD'08 Proceedings of the 12th Pacific-Asia conference on Advances in knowledge discovery and data mining
Automated analysis of feature models 20 years later: A literature review
Information Systems
A hybrid algorithm for LTL games
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Exploiting MOEA to automatically geneate test programs for path-delay faults in microprocessors
Evo'08 Proceedings of the 2008 conference on Applications of evolutionary computing
Reasoning about optimal collections of solutions
CP'09 Proceedings of the 15th international conference on Principles and practice of constraint programming
Fault tolerance for embedded control system
ISCIT'09 Proceedings of the 9th international conference on Communications and information technologies
On the OBDD complexity of the most significant bit of integer multiplication
TAMC'08 Proceedings of the 5th international conference on Theory and applications of models of computation
Evolvability via modularity-induced mutational focussing
EuroGP'08 Proceedings of the 11th European conference on Genetic programming
Static slicing-based pre-reduction technique for MDG model-checker
IIT'09 Proceedings of the 6th international conference on Innovations in information technology
Fault tree analysis of software-controlled component systems based on second-order probabilities
ISSRE'09 Proceedings of the 20th IEEE international conference on software reliability engineering
Solving games via three-valued abstraction refinement
Information and Computation
Pillars of computer science
PLDI '10 Proceedings of the 2010 ACM SIGPLAN conference on Programming language design and implementation
A new technique for realization of Boolean functions
AIKED'10 Proceedings of the 9th WSEAS international conference on Artificial intelligence, knowledge engineering and data bases
Model checking firewall policy configurations
POLICY'09 Proceedings of the 10th IEEE international conference on Policies for distributed systems and networks
Solving fully-observable non-deterministic planning problems via translation into a general game
KI'09 Proceedings of the 32nd annual German conference on Advances in artificial intelligence
Causal analysis with Chain Event Graphs
Artificial Intelligence
Semantics based crossover for boolean problems
Proceedings of the 12th annual conference on Genetic and evolutionary computation
Binary superposed quantum decision diagrams
Quantum Information Processing
Post-silicon validation opportunities, challenges and recent advances
Proceedings of the 47th Design Automation Conference
An AIG-Based QBF-solver using SAT for preprocessing
Proceedings of the 47th Design Automation Conference
Towards scalable system-level reliability analysis
Proceedings of the 47th Design Automation Conference
Scalable specification mining for verification and diagnosis
Proceedings of the 47th Design Automation Conference
Approximate dynamic programming with affine ADDs
Proceedings of the 9th International Conference on Autonomous Agents and Multiagent Systems: volume 1 - Volume 1
Soft error modeling and remediation techniques in ASIC designs
Microelectronics Journal
Exponential space complexity for OBDD-based reachability analysis
Information Processing Letters
Scalability of communicators and groups in MPI
Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing
SPAN: a unified framework and toolkit for querying heterogeneous access policies
HotSec'09 Proceedings of the 4th USENIX conference on Hot topics in security
A framework for the automatic synthesis of hybrid fuzzy/numerical controllers
Applied Soft Computing
Top-Down Algorithms for Constructing Structured DNNF: Theoretical and Practical Implications
Proceedings of the 2010 conference on ECAI 2010: 19th European Conference on Artificial Intelligence
A Decentralised Symbolic Diagnosis Approach
Proceedings of the 2010 conference on ECAI 2010: 19th European Conference on Artificial Intelligence
Knowledge Compilation Using Interval Automata and Applications to Planning
Proceedings of the 2010 conference on ECAI 2010: 19th European Conference on Artificial Intelligence
Parallel Model Checking for Temporal Epistemic Logic
Proceedings of the 2010 conference on ECAI 2010: 19th European Conference on Artificial Intelligence
Knowledge Compilation for Itemset Mining
Proceedings of the 2010 conference on ECAI 2010: 19th European Conference on Artificial Intelligence
Partially-shared zero-suppressed multi-terminal BDDs: concept, algorithms and applications
Formal Methods in System Design
Interactive cost configuration over decision diagrams
Journal of Artificial Intelligence Research
Boolean affine approximation with binary decision diagrams
CATS '09 Proceedings of the Fifteenth Australasian Symposium on Computing: The Australasian Theory - Volume 94
FlowChecker: configuration analysis and verification of federated openflow infrastructures
Proceedings of the 3rd ACM workshop on Assurable and usable security configuration
Modular datapath optimization and verification based on modular-HED
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Solving constraint satisfaction problems using finite state automata
AAAI'92 Proceedings of the tenth national conference on Artificial intelligence
Multi-domain surety modeling and analysis for high assurance systems
ECBS'99 Proceedings of the 1999 IEEE conference on Engineering of computer-based systems
Symbolic model checking in practice
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
Planning interventions in biological networks
ACM Transactions on Intelligent Systems and Technology (TIST)
Parallel inclusion-based points-to analysis
Proceedings of the ACM international conference on Object oriented programming systems languages and applications
Validating low-level instructions for fixnums using BDDs
Proceedings of the 2010 international conference on Lisp
RALF: reliability analysis for logic faults: an exact algorithm and its applications
Proceedings of the Conference on Design, Automation and Test in Europe
Tighter integration of BDDs and SMT for predicate abstraction
Proceedings of the Conference on Design, Automation and Test in Europe
Incorporating graceful degradation into embedded system design
Proceedings of the Conference on Design, Automation and Test in Europe
Property analysis and design understanding
Proceedings of the Conference on Design, Automation and Test in Europe
Sequential logic synthesis using symbolic bi-decomposition
Proceedings of the Conference on Design, Automation and Test in Europe
On decomposing Boolean functions via extended cofactoring
Proceedings of the Conference on Design, Automation and Test in Europe
Exploiting structure in an AIG based QBF solver
Proceedings of the Conference on Design, Automation and Test in Europe
Sequential logic rectifications with approximate SPFDs
Proceedings of the Conference on Design, Automation and Test in Europe
Components, platforms and possibilities: towards generic automation for MDA
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
Transactions on rough sets XII
A scalable segmented decision tree abstract domain
Time for verification
What is in a step: new perspectives on a classical question
Time for verification
BOXES: a symbolic abstract domain of boxes
SAS'10 Proceedings of the 17th international conference on Static analysis
Instantiating general games using prolog or dependency graphs
KI'10 Proceedings of the 33rd annual German conference on Advances in artificial intelligence
Differential static analysis: opportunities, applications, and challenges
Proceedings of the FSE/SDP workshop on Future of software engineering research
Leader election in anonymous radio networks: model checking energy consumption
ASMTA'10 Proceedings of the 17th international conference on Analytical and stochastic modeling techniques and applications
Combining symbolic representations for solving timed games
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
Exponential space complexity for symbolic maximum flow algorithms in 0-1 networks
MFCS'10 Proceedings of the 35th international conference on Mathematical foundations of computer science
The role of syntactic and semantic locality of crossover in genetic programming
PPSN'10 Proceedings of the 11th international conference on Parallel problem solving from nature: Part II
Preprocessing boolean formulae for BDDs in a probabilistic context
JELIA'10 Proceedings of the 12th European conference on Logics in artificial intelligence
Automated detection of injected faults in a differential equation solver
HASE'04 Proceedings of the Eighth IEEE international conference on High assurance systems engineering
Grounding FO and FO(ID) with bounds
Journal of Artificial Intelligence Research
Fast set bounds propagation using a BDD-SAT hybrid
Journal of Artificial Intelligence Research
UTP and temporal logic model checking
UTP'08 Proceedings of the 2nd international conference on Unifying theories of programming
Improving NFA-based signature matching using ordered binary decision diagrams
RAID'10 Proceedings of the 13th international conference on Recent advances in intrusion detection
Fast Karnough map for simplification of complex Boolean functions
ACS'10 Proceedings of the 10th WSEAS international conference on Applied computer science
A hybrid fault simulator for synchronous sequential circuits
ITC'94 Proceedings of the 1994 international conference on Test
Making the circular self-test path technique effective for real circuits
ITC'94 Proceedings of the 1994 international conference on Test
Full symbolic ATPG for large circuits
ITC'94 Proceedings of the 1994 international conference on Test
Policy segmentation for intelligent firewall testing
NPSEC'05 Proceedings of the First international conference on Secure network protocols
Verification of software via integration of design and implementation
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A dynamic firing speculation to speedup distributed symbolic state-space generation
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Quantifying the Degree of Self-Nestedness of Trees: Application to the Structural Analysis of Plants
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
Randomized OBDDs for the most significant bit of multiplication need exponential space
Information Processing Letters
Computational complexity analysis of determinant decision diagram
IEEE Transactions on Circuits and Systems II: Express Briefs
SampleSearch: Importance sampling in presence of determinism
Artificial Intelligence
MDE-based approach for generalizing design space exploration
MODELS'10 Proceedings of the 13th international conference on Model driven engineering languages and systems: Part I
A technique for automatic validation of model transformations
MODELS'10 Proceedings of the 13th international conference on Model driven engineering languages and systems: Part I
Lattice-valued binary decision diagrams
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Variable compression in ProbLog
LPAR'10 Proceedings of the 17th international conference on Logic for programming, artificial intelligence, and reasoning
State agnostic planning graphs: deterministic, non-deterministic, and probabilistic planning
Artificial Intelligence
Knowledge compilation meets database theory: compiling queries to decision diagrams
Proceedings of the 14th International Conference on Database Theory
Mutation-based test case generation for simulink models
FMCO'09 Proceedings of the 8th international conference on Formal methods for components and objects
The nullness analyser of JULIA
LPAR'10 Proceedings of the 16th international conference on Logic for programming, artificial intelligence, and reasoning
Comparing learning algorithms in automated assume-guarantee reasoning
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Optimized temporal monitors for SystemC
RV'10 Proceedings of the First international conference on Runtime verification
Trace-driven verification of multithreaded programs
ICFEM'10 Proceedings of the 12th international conference on Formal engineering methods and software engineering
Making the right cut in model checking data-intensive timed systems
ICFEM'10 Proceedings of the 12th international conference on Formal engineering methods and software engineering
On symbolic OBDD-based algorithms for the minimum spanning tree problem
COCOA'10 Proceedings of the 4th international conference on Combinatorial optimization and applications - Volume Part II
Larger lower bounds on the OBDD complexity of integer multiplication
Information and Computation
Randomized OBDDs for the most significant bit of multiplication need exponential size
SOFSEM'11 Proceedings of the 37th international conference on Current trends in theory and practice of computer science
Finding the description of structure by counting method: a case study
SOFSEM'11 Proceedings of the 37th international conference on Current trends in theory and practice of computer science
Hierarchical exact symbolic analysis of large analog integrated circuits by symbolic stamps
Proceedings of the 16th Asia and South Pacific Design Automation Conference
On the OBDD complexity of the most significant bit of integer multiplication
Theoretical Computer Science
ProgME: towards programmable network measurement
IEEE/ACM Transactions on Networking (TON)
Function-based compact test pattern generation for path delay faults
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Sechecker: a sequential equivalence checking framework based on K th invariants
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamically consistent reduction of logical regulatory graphs
Theoretical Computer Science
A decade of software model checking with SLAM
Communications of the ACM
Routability checking for three-dimensional architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The Mechanical Verification of a DPLL-Based Satisfiability Solver
Electronic Notes in Theoretical Computer Science (ENTCS)
On the implementation of the probabilistic logic programming language problog
Theory and Practice of Logic Programming
Temporal formula specifications of asynchronous control module in model checking
ACS'06 Proceedings of the 6th WSEAS international conference on Applied computer science
Algorithms for physical implementation of multiple-valued circuits
SMO'05 Proceedings of the 5th WSEAS international conference on Simulation, modelling and optimization
IDD-based model validation of biochemical networks
Theoretical Computer Science
Algebraic implementation of CTL model checker
MMACTEE'06 Proceedings of the 8th WSEAS international conference on Mathematical methods and computational techniques in electrical engineering
Generalized rabin(1) synthesis with applications to robust system synthesis
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Cycle elimination for invocation graph-based context-sensitive pointer analysis
Information and Software Technology
NuMDG: a new tool for multiway decision graphs construction
Journal of Computer Science and Technology - Special issue on natural language processing
Clairvoyant: a synthesis system for production-based specification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Logic design error diagnosis and correction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Certified timing verification and the transition delay of a logic circuit
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Testability analysis and behavioral testing of the Hopfield neural paradigm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An ROBDD-based combinatorial method for the evaluation of yield of defect-tolerant systems-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Extracting hot spots of topics from time-stamped documents
Data & Knowledge Engineering
Efficient solutions to factored MDPs with imprecise transition probabilities
Artificial Intelligence
Software and Systems Modeling (SoSyM)
Semantically-based crossover in genetic programming: application to real-valued symbolic regression
Genetic Programming and Evolvable Machines
Anomaly discovery and resolution in web access control policies
Proceedings of the 16th ACM symposium on Access control models and technologies
Automatic verification of estimate functions with polynomials of bounded functions
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Symbolic model checking of probabilistic knowledge
Proceedings of the 13th Conference on Theoretical Aspects of Rationality and Knowledge
Using binary decision diagrams for combinatorial test design
Proceedings of the 2011 International Symposium on Software Testing and Analysis
Symbolic computation of strongly connected components and fair cycles using saturation
Innovations in Systems and Software Engineering
Symbolic model checking the knowledge in Herbivore protocol
MoChArt'10 Proceedings of the 6th international conference on Model checking and artificial intelligence
Improving ESOP-based synthesis of reversible logic using evolutionary algorithms
EvoApplications'11 Proceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II
Manipulating MDD relaxations for combinatorial optimization
CPAIOR'11 Proceedings of the 8th international conference on Integration of AI and OR techniques in constraint programming for combinatorial optimization problems
Graph-based simulation of quantum computation in the density matrix representation
Quantum Information & Computation
Structured specifications for better verification of heap-manipulating programs
FM'11 Proceedings of the 17th international conference on Formal methods
A multi-encoding approach for LTL symbolic satisfiability checking
FM'11 Proceedings of the 17th international conference on Formal methods
Counterexample generation for Markov chains using SMT-based bounded model checking
FMOODS'11/FORTE'11 Proceedings of the joint 13th IFIP WG 6.1 and 30th IFIP WG 6.1 international conference on Formal techniques for distributed systems
Modeling and verification of a protocol for operational support using coloured petri nets
PETRI NETS'11 Proceedings of the 32nd international conference on Applications and theory of Petri Nets
Extending probLog with continuous distributions
ILP'10 Proceedings of the 20th international conference on Inductive logic programming
An approach for effective design space exploration
FOCS'10 Proceedings of the 16th Monterey conference on Foundations of computer software: modeling, development, and verification of adaptive systems
BDDs for pseudo-boolean constraints: revisited
SAT'11 Proceedings of the 14th international conference on Theory and application of satisfiability testing
DPLL+ROBDD Derivation applied to inversion of some cryptographic functions
SAT'11 Proceedings of the 14th international conference on Theory and application of satisfiability testing
πDD: a new decision diagram for efficient problem solving in permutation space
SAT'11 Proceedings of the 14th international conference on Theory and application of satisfiability testing
Implicit permutation enumeration networks and binary decision diagrams reordering
Proceedings of the 48th Design Automation Conference
Using SAT-based Craig interpolation to enlarge clock gating functions
Proceedings of the 48th Design Automation Conference
Automated mapping for reconfigurable single-electron transistor arrays
Proceedings of the 48th Design Automation Conference
Functional term rewriting systems towards symbolic model-checking
International Journal of Critical Computer-Based Systems
Fast, memory-efficient regular expression matching with NFA-OBDDs
Computer Networks: The International Journal of Computer and Telecommunications Networking
Comparing machine learning approaches for context-aware composition
SC'11 Proceedings of the 10th international conference on Software composition
Importance sampling on Bayesian networks with deterministic causalities
ECSQARU'11 Proceedings of the 11th European conference on Symbolic and quantitative approaches to reasoning with uncertainty
Top-down induction of reduced ordered decision diagrams from neural networks
ICANN'11 Proceedings of the 21st international conference on Artificial neural networks - Volume Part II
Enforcing confidentiality and data visibility constraints: an OBDD approach
DBSec'11 Proceedings of the 25th annual IFIP WG 11.3 conference on Data and applications security and privacy
On the verification of social commitments and time
The 10th International Conference on Autonomous Agents and Multiagent Systems - Volume 2
A quantifier elimination algorithm for linear modular equations and disequations
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Decisions: algebra and implementation
MLDM'11 Proceedings of the 7th international conference on Machine learning and data mining in pattern recognition
Learning the parameters of probabilistic logic programs from interpretations
ECML PKDD'11 Proceedings of the 2011 European conference on Machine learning and knowledge discovery in databases - Volume Part I
Game-theoretic simulation checking tool
Programming and Computing Software
Magic-sets for localised analysis of Java bytecode
Higher-Order and Symbolic Computation
Managing RFID events in large-scale distributed RFID infrastructures
Information Technology and Management
MDD propagators with explanation
Constraints
Decomposition of systems of Boolean functions determined by binary decision diagrams
Journal of Computer and Systems Sciences International
Automated addition of fault recovery to cyber-physical component-based models
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
Better algorithms for analyzing and enacting declarative workflow languages using LTL
BPM'11 Proceedings of the 9th international conference on Business process management
Boolean equi-propagation for optimized SAT encoding
CP'11 Proceedings of the 17th international conference on Principles and practice of constraint programming
A more efficient BDD-based QBF solver
CP'11 Proceedings of the 17th international conference on Principles and practice of constraint programming
Logico-numerical abstract acceleration and application to the verification of data-flow programs
SAS'11 Proceedings of the 18th international conference on Static analysis
On the adoption of model checking in safety-related software industry
SAFECOMP'11 Proceedings of the 30th international conference on Computer safety, reliability, and security
ECSA'11 Proceedings of the 5th European conference on Software architecture
Decision-theoretic planning with generalized first-order decision diagrams
Artificial Intelligence
Uncertainty handling in quantitative BDD-based fault-tree analysis by interval computation
SUM'11 Proceedings of the 5th international conference on Scalable uncertainty management
Formal analysis of online algorithms
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Efficient inclusion checking on explicit and semi-symbolic tree automata
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Policy iteration within logico-numerical abstract domains
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Symbolic verification and test generation for a network of communicating FSMs
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Feasibility of Stepwise Design of Multitolerant Programs
ACM Transactions on Software Engineering and Methodology (TOSEM)
A robust asynchronous early output full adder
WSEAS Transactions on Circuits and Systems
Encrypted Packet Forwarding in Virtualized Networks
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Decomposition-based logic synthesis for PAL-based CPLDs
International Journal of Applied Mathematics and Computer Science
De Bruijn sequences and complexity of symmetric functions
Cryptography and Communications
SPUDD: stochastic planning using decision diagrams
UAI'99 Proceedings of the Fifteenth conference on Uncertainty in artificial intelligence
Using ROBDDs for inference in Bayesian networks with troubleshooting as an example
UAI'00 Proceedings of the Sixteenth conference on Uncertainty in artificial intelligence
Structured arc reversal and simulation of dynamic probabilistic networks
UAI'97 Proceedings of the Thirteenth conference on Uncertainty in artificial intelligence
Context-specific independence in Bayesian networks
UAI'96 Proceedings of the Twelfth international conference on Uncertainty in artificial intelligence
Fast sort computations for order-sorted matching and unification
Formal modeling
Symbolic support graph: a space efficient data structure for incremental tabled evaluation
ICLP'05 Proceedings of the 21st international conference on Logic Programming
Designing safe, reliable systems using scade
ISoLA'04 Proceedings of the First international conference on Leveraging Applications of Formal Methods
Manipulating MAXLIVE for spill-free register allocation
LCPC'05 Proceedings of the 18th international conference on Languages and Compilers for Parallel Computing
Symmetric item set mining based on zero-suppressed BDDs
DS'06 Proceedings of the 9th international conference on Discovery Science
Abstraction and refinement in model checking
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
Compiling constraint networks into AND/OR multi-valued decision diagrams (AOMDDs)
CP'06 Proceedings of the 12th international conference on Principles and Practice of Constraint Programming
Extended resolution proofs for conjoining BDDs
CSR'06 Proceedings of the First international computer science conference on Theory and Applications
Using datalog with binary decision diagrams for program analysis
APLAS'05 Proceedings of the Third Asian conference on Programming Languages and Systems
Symbolic verification of distributed real-time systems with complex synchronizations
ICFEM'05 Proceedings of the 7th international conference on Formal Methods and Software Engineering
Reasoning about bayesian network classifiers
UAI'03 Proceedings of the Nineteenth conference on Uncertainty in Artificial Intelligence
Symbolic generalization for on-line planning
UAI'03 Proceedings of the Nineteenth conference on Uncertainty in Artificial Intelligence
A new reachability algorithm for symmetric multi-processor architecture
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Exploiting hub states in automatic verification
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Model checking prioritized timed automata
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
An MTBDD-based implementation of forward reachability for probabilistic timed automata
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Zap: automated theorem proving for software analysis
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Experimental evaluation of classical automata constructions
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Treewidth in verification: local vs. global
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Decomposing controllers into non-conflicting distributed controllers
ICTAC'04 Proceedings of the First international conference on Theoretical Aspects of Computing
Using DPLL for efficient OBDD construction
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
CirCUs: a hybrid satisfiability solver
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Search vs. symbolic techniques in satisfiability solving
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Zchaff2004: an efficient SAT solver
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Reducing model checking of the few to the one
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
Tool for translating simulink models into input language of a model checker
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
On the BDD of a random boolean function
ASIAN'04 Proceedings of the 9th Asian Computing Science conference on Advances in Computer Science: dedicated to Jean-Louis Lassez on the Occasion of His 5th Cycle Birthday
Firewall policy change-impact analysis
ACM Transactions on Internet Technology (TOIT)
Reducing software architecture models complexity: a slicing and abstraction approach
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Optimized colored nets unfolding
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Formal analysis and improvement of the state transition model for intrusion tolerant system
WINE'05 Proceedings of the First international conference on Internet and Network Economics
The knowledge cartography – a new approach to reasoning over description logics ontologies
SOFSEM'06 Proceedings of the 32nd conference on Current Trends in Theory and Practice of Computer Science
The complexity of problems on implicitly represented inputs
SOFSEM'06 Proceedings of the 32nd conference on Current Trends in Theory and Practice of Computer Science
VSOP (valued-sum-of-products) calculator for knowledge processing based on zero-suppressed BDDs
Proceedings of the 2005 international conference on Federation over the Web
Finding compact BDDs using genetic programming
EuroGP'06 Proceedings of the 2006 international conference on Applications of Evolutionary Computing
Improved SAT based bounded model checking
TAMC'06 Proceedings of the Third international conference on Theory and Applications of Models of Computation
Observation-Based logic of knowledge, belief, desire and intention
KSEM'06 Proceedings of the First international conference on Knowledge Science, Engineering and Management
Qualitative petri net modelling of genetic networks
Transactions on Computational Systems Biology VI
MDG-SAT: an automated methodology for efficient safety checking
International Journal of Critical Computer-Based Systems
Finding small OBDDs for incompletely specified truth tables is hard
COCOON'06 Proceedings of the 12th annual international conference on Computing and Combinatorics
ASIAN'09 Proceedings of the 13th Asian conference on Advances in Computer Science: information Security and Privacy
Static timing analysis for hard real-time systems
VMCAI'10 Proceedings of the 11th international conference on Verification, Model Checking, and Abstract Interpretation
A larger lower bound on the OBDD complexity of the most significant bit of multiplication
LATIN'10 Proceedings of the 9th Latin American conference on Theoretical Informatics
Integrating CSP decomposition techniques and BDDs for compiling configuration problems
CPAIOR'05 Proceedings of the Second international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Representation of graphs by OBDDs
ISAAC'05 Proceedings of the 16th international conference on Algorithms and Computation
A symbolic search based approach for quantified boolean formulas
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
Resolution tunnels for improved SAT solver performance
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
FM'05 Proceedings of the 2005 international conference on Formal Methods
Verification of an error correcting code by abstract interpretation
VMCAI'05 Proceedings of the 6th international conference on Verification, Model Checking, and Abstract Interpretation
Information flow analysis for java bytecode
VMCAI'05 Proceedings of the 6th international conference on Verification, Model Checking, and Abstract Interpretation
A simple implementation of determinant decision diagram
Proceedings of the International Conference on Computer-Aided Design
Symbolic system level reliability analysis
Proceedings of the International Conference on Computer-Aided Design
Efficient database analysis using VSOP calculator based on zero-suppressed BDDs
JSAI'05 Proceedings of the 2005 international conference on New Frontiers in Artificial Intelligence
BPEL behavioral abstraction and matching
BPM'06 Proceedings of the 2006 international conference on Business Process Management Workshops
Representing paraconsistent reasoning via quantified propositional logic
Inconsistency Tolerance
Genetic linkage analysis algorithms and their implementation
Transactions on Computational Systems Biology III
Experiments with multiple abstraction heuristics in symbolic verification
SARA'05 Proceedings of the 6th international conference on Abstraction, Reformulation and Approximation
Belief revision of GIS systems: the results of REV!GIS
ECSQARU'05 Proceedings of the 8th European conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
The complexity of model checking higher order fixpoint logic
MFCS'05 Proceedings of the 30th international conference on Mathematical Foundations of Computer Science
Towards symbolic model checking for multi-agent systems via OBDD's
FAABS'04 Proceedings of the Third international conference on Formal Approaches to Agent-Based Systems
Exact quantum algorithms for the leader election problem
STACS'05 Proceedings of the 22nd annual conference on Theoretical Aspects of Computer Science
An automated dependability analysis method for COTS-based systems
ICCBSS'05 Proceedings of the 4th international conference on COTS-Based Software Systems
Empirically efficient verification for a class of infinite-state systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Truly on-the-fly LTL model checking
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient conflict analysis for finding all satisfying assignments of a boolean circuit
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
DiVer: SAT-based model checking platform for verifying large scale systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Estimation of the density of datasets with decision diagrams
ISMIS'05 Proceedings of the 15th international conference on Foundations of Intelligent Systems
EUROCAST'05 Proceedings of the 10th international conference on Computer Aided Systems Theory
ABC: an academic industrial-strength verification tool
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Synthesis of quantized feedback control software for discrete time linear hybrid systems
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Verification of BDD normalization
TPHOLs'05 Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics
A GPU implementation of inclusion-based points-to analysis
Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
A complete abstract interpretation framework for coverability properties of WSTS
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Detecting non-cyclicity by abstract compilation into boolean functions
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
A logic and decision procedure for predicate abstraction of heap-manipulating programs
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Synthesis of reactive(1) designs
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Embedding memoization to the semantic tree search for deciding QBFs
AI'04 Proceedings of the 17th Australian joint conference on Advances in Artificial Intelligence
Predicate abstraction via symbolic decision procedures
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Formal verification of pentium ® 4 components with symbolic simulation and inductive invariants
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Syntax-driven reachable state space construction of synchronous reactive programs
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symbolic systems, explicit properties: on hybrid approaches for LTL symbolic model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symbolic compositional verification by learning assumptions
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Genetic algorithms for the variable ordering problem of binary decision diagrams
FOGA'05 Proceedings of the 8th international conference on Foundations of Genetic Algorithms
A symbolic model checker for tccp programs
RISE'04 Proceedings of the First international conference on Rapid Integration of Software Engineering Techniques
Model-Driven safety evaluation with state-event-based component failure annotations
CBSE'05 Proceedings of the 8th international conference on Component-Based Software Engineering
On symbolic scheduling independent tasks with restricted execution times
WEA'05 Proceedings of the 4th international conference on Experimental and Efficient Algorithms
BDDs in a branch and cut framework
WEA'05 Proceedings of the 4th international conference on Experimental and Efficient Algorithms
A design methodology for secured ICs using dynamic current mode logic
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
SPIN'05 Proceedings of the 12th international conference on Model Checking Software
Saturation-based symbolic reachability analysis using conjunctive and disjunctive partitioning
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Automatic generation of hints for symbolic traversal
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
An analysis of SAT-based model checking techniques in an industrial environment
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
FPGA based accelerator for 3-SAT conflict analysis in SAT solvers
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Predictive reachability using a sample-based approach
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
SAS'05 Proceedings of the 12th international conference on Static Analysis
Pair-sharing analysis of object-oriented programs
SAS'05 Proceedings of the 12th international conference on Static Analysis
EPEW'05/WS-FM'05 Proceedings of the 2005 international conference on European Performance Engineering, and Web Services and Formal Methods, international conference on Formal Techniques for Computer Systems and Business Processes
Integrating formal verification in an online judge for e-Learning logic circuit design
Proceedings of the 43rd ACM technical symposium on Computer Science Education
Algebraic approach to arithmetic design verification
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Approximate reachability with combined symbolic and ternary simulation
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
A BDD-Like implementation of an automata package
CIAA'04 Proceedings of the 9th international conference on Implementation and Application of Automata
A symbolic approach to the all-pairs shortest-paths problem
WG'04 Proceedings of the 30th international conference on Graph-Theoretic Concepts in Computer Science
Transformation from ad hoc EDA to algorithmic EDA
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
A fine-grained debugger for aspect-oriented programming
Proceedings of the 11th annual international conference on Aspect-oriented Software Development
Symbolic model checking of finite precision timed automata
ICTAC'05 Proceedings of the Second international conference on Theoretical Aspects of Computing
Information flow is linear refinement of constancy
ICTAC'05 Proceedings of the Second international conference on Theoretical Aspects of Computing
Abstraction-Guided model checking using symbolic IDA* and heuristic synthesis
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Hierarchical decision diagrams to exploit model structure
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Correctness issues of symbolic bisimulation computation for markov chains
MMB&DFT'10 Proceedings of the 15th international GI/ITG conference on Measurement, Modelling, and Evaluation of Computing Systems and Dependability and Fault Tolerance
Wendy: a tool to synthesize partners for services
PETRI NETS'10 Proceedings of the 31st international conference on Applications and Theory of Petri Nets
GreatSPN enhanced with decision diagram data structures
PETRI NETS'10 Proceedings of the 31st international conference on Applications and Theory of Petri Nets
Model-based variable and transition orderings for efficient symbolic model checking
FM'06 Proceedings of the 14th international conference on Formal Methods
Extended resolution proofs for symbolic SAT solving with quantification
SAT'06 Proceedings of the 9th international conference on Theory and Applications of Satisfiability Testing
Semigroupoid interfaces for relation-algebraic programming in haskell
RelMiCS'06/AKA'06 Proceedings of the 9th international conference on Relational Methods in Computer Science, and 4th international conference on Applications of Kleene Algebra
A method for switching activity analysis of VHDL-RTL combinatorial circuits
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
A fine-grained fullness-guided chaining heuristic for symbolic reachability analysis
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Learning-based symbolic assume-guarantee reasoning with automatic decomposition
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Sigref: a symbolic bisimulation tool box
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Specification and evaluation of safety properties in a component-based software engineering process
Component-Based Software Development for Embedded Systems
An introduction to symbolic trajectory evaluation
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
BDD-Based hardware verification
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
SAT-Based verification methods and applications in hardware verification
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
Building efficient decision procedures on top of SAT solvers
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
Floating-Point verification using theorem proving
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
Transactions on Computational Systems Biology VII
Concurrency, Compositionality, and Correctness
Deterministic dynamic monitors for linear-time assertions
FATES'06/RV'06 Proceedings of the First combined international conference on Formal Approaches to Software Testing and Runtime Verification
BDDRPA*: an efficient BDD-Based incremental heuristic search algorithm for replanning
AI'06 Proceedings of the 19th Australian joint conference on Artificial Intelligence: advances in Artificial Intelligence
The complexity of model checking concurrent programs against CTLK specifications
DALT'06 Proceedings of the 4th international conference on Declarative Agent Languages and Technologies
AlPiNA: an algebraic petri net analyzer
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Minimization of non-deterministic automata with large alphabets
CIAA'05 Proceedings of the 10th international conference on Implementation and Application of Automata
Simultaneous SAT-Based model checking of safety properties
HVC'05 Proceedings of the First Haifa international conference on Hardware and Software Verification and Testing
Exponential lower bounds on the space complexity of OBDD-Based graph algorithms
LATIN'06 Proceedings of the 7th Latin American conference on Theoretical Informatics
New metrics for static variable ordering in decision diagrams
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Widening ROBDDs with prime implicants
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient guided symbolic reachability using reachability expressions
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
On the integration of software testing and formal analysis
Empirical Software Engineering and Verification
Performance analysis of error-correcting binary decision diagrams
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part II
MEMICS'11 Proceedings of the 7th international conference on Mathematical and Engineering Methods in Computer Science
Formal Methods in System Design
Discrete Event Dynamic Systems
A symbolic modelling approach for the formal verification of integrated mixed-mode systems
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
High level reduction technique for multiway decision graphs based model checking
VECoS'07 Proceedings of the First international conference on Verification and Evaluation of Computer and Communication Systems
Multiway decision graphs reduction approach based on the HOL theorem prover
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
SBMC: symmetric bounded model checking
VECoS'10 Proceedings of the Fourth international conference on Verification and Evaluation of Computer and Communication Systems
LTL translation improvements in spot
VECoS'11 Proceedings of the Fifth international conference on Verification and Evaluation of Computer and Communication Systems
Hardware dependability in the presence of soft errors
VoCS'08 Proceedings of the 2008 international conference on Visions of Computer Science: BCS International Academic Conference
Sciduction: combining induction, deduction, and structure for verification and synthesis
Proceedings of the 49th Annual Design Automation Conference
Generalized SAT-sweeping for post-mapping optimization
Proceedings of the 49th Annual Design Automation Conference
Ten years of saturation: a petri net perspective
Transactions on Petri Nets and Other Models of Concurrency V
Computing a hierarchical static order for decision diagram-based representation from p/t nets
Transactions on Petri Nets and Other Models of Concurrency V
Bounded model checking for parametric timed automata
Transactions on Petri Nets and Other Models of Concurrency V
Transactions on Petri Nets and Other Models of Concurrency V
An efficient implicit OBDD-Based algorithm for maximal matchings
LATA'12 Proceedings of the 6th international conference on Language and Automata Theory and Applications
Argos: an automaton-based synchronous language
Computer Languages
Design and implementation of sparse global analyses for C-like languages
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
SuperC: parsing all of C by taming the preprocessor
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
VATA: a library for efficient manipulation of non-deterministic tree automata
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Template-Based controller synthesis for timed systems
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automated model repair for distributed programs
ACM SIGACT News
Optimized composition of performance-aware parallel components
Concurrency and Computation: Practice & Experience
SDD: a new canonical representation of propositional knowledge bases
IJCAI'11 Proceedings of the Twenty-Second international joint conference on Artificial Intelligence - Volume Volume Two
An efficient heuristic to identify threshold logic functions
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Proceedings of the 17th ACM symposium on Access Control Models and Technologies
Logic programs as compact denotations
Computer Languages, Systems and Structures
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
Counterexamples to the long-standing conjecture on the complexity of BDD binary operations
Information Processing Letters
On symbolic OBDD-based algorithms for the minimum spanning tree problem
Theoretical Computer Science
Dynamic segregative genetic algorithm for optimizing the variable ordering of ROBDDs
Proceedings of the 14th annual conference on Genetic and evolutionary computation
Event processing under uncertainty
Proceedings of the 6th ACM International Conference on Distributed Event-Based Systems
Structure-based deadlock checking of asynchronous circuits
Journal of Computer Science and Technology - Special issue on Natural Language Processing
Symbolic model checking for temporal-epistemic logic
Logic Programs, Norms and Action
Solving difficult SAT problems by using OBDDs and greedy clique decomposition
FAW-AAIM'12 Proceedings of the 6th international Frontiers in Algorithmics, and Proceedings of the 8th international conference on Algorithmic Aspects in Information and Management
Implicit computation of maximum bipartite matchings by sublinear functional operations
TAMC'12 Proceedings of the 9th Annual international conference on Theory and Applications of Models of Computation
Variable ordering for the application of BDDs to the maximum independent set problem
CPAIOR'12 Proceedings of the 9th international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Incremental set recommendation based on class differences
PAKDD'12 Proceedings of the 16th Pacific-Asia conference on Advances in Knowledge Discovery and Data Mining - Volume Part I
Abstract property language for MDG model checking methodology
International Journal of Computer Applications in Technology
BDD-based Bounded Model Checking for Temporal Properties of 1-Safe Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Compact Representations and Efficient Algorithms for Operating Guidelines
Fundamenta Informaticae - Application of Concurrency to System Design, the Eighth Special Issue
High-Level Petri Net Model Checking with AlPiNA
Fundamenta Informaticae - Applications and Theory of Petri Nets and Other Models of Concurrency, 2010
Wendy: A Tool to Synthesize Partners for Services
Fundamenta Informaticae - Applications and Theory of Petri Nets and Other Models of Concurrency, 2010
Synthesizing number transformations from input-output examples
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
k-Optimal: a novel approximate inference algorithm for ProbLog
ILP'11 Proceedings of the 21st international conference on Inductive Logic Programming
Analysis of trivium using compressed right hand side equations
ICISC'11 Proceedings of the 14th international conference on Information Security and Cryptology
Beyond first-order satisfaction: fixed points, interpolants, automata and polynomials
SPIN'12 Proceedings of the 19th international conference on Model Checking Software
Building Efficient Model Checkers using Hierarchical Set Decision Diagrams and Automatic Saturation
Fundamenta Informaticae - Petri Nets 2008
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
A Contribution to the Use of Decision Diagrams for Loading and Mining Transaction Databases
Fundamenta Informaticae - Special issue ISMIS'05
Bounded Model Checking for the Existential Fragment of TCTL$_{-G}$ and Diagonal Timed Automata
Fundamenta Informaticae
Representing CSPs with set-labeled diagrams: a compilation map
GKR'11 Proceedings of the Second international conference on Graph Structures for Knowledge Representation and Reasoning
Scalable flow-sensitive pointer analysis for java with strong updates
ECOOP'12 Proceedings of the 26th European conference on Object-Oriented Programming
Verification of the TESLA protocol in MCMAS-X
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
Formal verification of compiler transformations on polychronous equations
IFM'12 Proceedings of the 9th international conference on Integrated Formal Methods
Comparing BDD and SAT Based Techniques for Model Checking Chaum's Dining Cryptographers Protocol
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
Verifying conformance of multi-agent commitment-based protocols
Expert Systems with Applications: An International Journal
Detecting State Encoding Conflicts in STG Unfoldings Using SAT
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Fundamenta Informaticae - Computing Patterns in Strings
The BDD Space Complexity of Different Forms of Concurrency
Fundamenta Informaticae - Application of Concurrency to System Design
Bounded Model Checking for the Universal Fragment of CTL
Fundamenta Informaticae - Concurrency Specification and Programming Workshop (CS&P'2001)
Thue Specifications, Infinite Graphs and Synchronized Product
Fundamenta Informaticae
Formal Verification and Diagnosis of Combinational Circuit Designs with Propositional Logic
Fundamenta Informaticae
Gröbner-free normal forms for Boolean polynomials
Journal of Symbolic Computation
Deadlock-freedom in component systems with architectural constraints
Formal Methods in System Design
Magic-sets transformation for the analysis of java bytecode
SAS'07 Proceedings of the 14th international conference on Static Analysis
Predicting protein folding kinetics via temporal logic model checking
WABI'07 Proceedings of the 7th international conference on Algorithms in Bioinformatics
Solving games via three-valued abstraction refinement
CONCUR'07 Proceedings of the 18th international conference on Concurrency Theory
A tool for network reliability analysis
SAFECOMP'07 Proceedings of the 26th international conference on Computer Safety, Reliability, and Security
Fast submatch extraction using OBDDs
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
Action-based discovery of satisfying subsets: A distributed method for model correction
Information and Software Technology
Formal modeling and model checking analysis of the wishbone system-on-chip bus protocol
ICICA'12 Proceedings of the Third international conference on Information Computing and Applications
An approach for network information flow analysis for systems of embedded components
MMM-ACNS'12 Proceedings of the 6th international conference on Mathematical Methods, Models and Architectures for Computer Network Security: computer network security
Conflict directed lazy decomposition
CP'12 Proceedings of the 18th international conference on Principles and Practice of Constraint Programming
Space-Time tradeoffs for the regular constraint
CP'12 Proceedings of the 18th international conference on Principles and Practice of Constraint Programming
Relation algebras, matrices, and multi-valued decision diagrams
RAMiCS'12 Proceedings of the 13th international conference on Relational and Algebraic Methods in Computer Science
The complexity of bounded synthesis for timed control with partial observability
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Optimising ordering strategies for symbolic model checking of railway interlockings
ISoLA'12 Proceedings of the 5th international conference on Leveraging Applications of Formal Methods, Verification and Validation: applications and case studies - Volume Part II
Optimized temporal monitors for SystemC
Formal Methods in System Design
Liveness vs safety: a practical viewpoint
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
Extreme symmetries in complex distributed systems: the bag-oriented approach
Proceedings of the 17th Monterey conference on Large-Scale Complex IT Systems: development, operation and management
Checking NFA equivalence with bisimulations up to congruence
POPL '13 Proceedings of the 40th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits
Analog Integrated Circuits and Signal Processing
BDD-Based Synthesis of Reversible Logic
International Journal of Applied Metaheuristic Computing
Towards scalable model checking of self-stabilizing programs
Journal of Parallel and Distributed Computing
A new look at BDDs for Pseudo-Boolean constraints
Journal of Artificial Intelligence Research
Extending quantifier elimination to linear inequalities on bit-vectors
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Equivalence checking of quantum protocols
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Quantum adiabatic machine learning
Quantum Information Processing
Code aware resource management
Formal Methods in System Design
Using cubes of non-state variables with property directed reachability
Proceedings of the Conference on Design, Automation and Test in Europe
Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Optimizing BDDs for time-series dataset manipulation
Proceedings of the Conference on Design, Automation and Test in Europe
A novel concurrent cache-friendly binary decision diagram construction for multi-core platforms
Proceedings of the Conference on Design, Automation and Test in Europe
On reconfigurable single-electron transistor arrays synthesis using reordering techniques
Proceedings of the Conference on Design, Automation and Test in Europe
BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition
Proceedings of the 50th Annual Design Automation Conference
Priority functions for the approximation of the metric TSP
Information Processing Letters
Conditional Safety Certification of Open Adaptive Systems
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
Efficient gröbner basis reductions for formal verification of galois field multipliers
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 17th International Software Product Line Conference co-located workshops
Multi-core systems modeling for formal verification of parallel algorithms
ACM SIGOPS Operating Systems Review
A Probabilistic Approach to Diagnose SETs in Sequential Circuits
Journal of Electronic Testing: Theory and Applications
Low-power compact composite field AES S-Box/Inv S-Box design in 65nm CMOS using Novel XOR Gate
Integration, the VLSI Journal
The 481 ways to split a clause and deal with propositional variables
CADE'13 Proceedings of the 24th international conference on Automated Deduction
On the "Q" in QMDDs: efficient representation of quantum functionality in the QMDD data-structure
RC'13 Proceedings of the 5th international conference on Reversible Computation
Compiling probabilistic graphical models using sentential decision diagrams
ECSQARU'13 Proceedings of the 12th European conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
CacBDD: a BDD package with dynamic cache management
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Multi-Core BDD Operations for Symbolic Reachability
Electronic Notes in Theoretical Computer Science (ENTCS)
Reachability analysis of program variables
ACM Transactions on Programming Languages and Systems (TOPLAS)
Reversible logic synthesis by quantum rotation gates
Quantum Information & Computation
Towards a knowledge compilation map for heterogeneous representation languages
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Knowledge compilation for model counting: affine decision trees
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Symbolic merge-and-shrink for cost-optimal planning
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Complex event processing over distributed probabilistic event streams
Computers & Mathematics with Applications
A fine-grained, customizable debugger for aspect-oriented programming
Transactions on Aspect-Oriented Software Development X
On the relationship between LTL normal forms and Büchi automata
Theories of Programming and Formal Methods
Minimization of binary decision diagrams for systems of incompletely defined Boolean functions
Journal of Computer and Systems Sciences International
Formal verification of synchronous data-flow program transformations toward certified compilers
Frontiers of Computer Science: Selected Publications from Chinese Universities
Learning from interpretation transition
Machine Learning
Model-based synthesis of control software from system-level formal specifications
ACM Transactions on Software Engineering and Methodology (TOSEM)
Automated generation of efficient instruction decoders for instruction set simulators
Proceedings of the International Conference on Computer-Aided Design
Partial synthesis through sampling with and without specification
Proceedings of the International Conference on Computer-Aided Design
Polychronous modeling, analysis, verification and simulation for timed software architectures
Journal of Systems Architecture: the EUROMICRO Journal
SOP restructuring by exploiting don't cares
Microprocessors & Microsystems
Temporal Logics for Phylogenetic Analysis via Model Checking
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
A simpler counterexample to a long-standing conjecture on the complexity of Bryant's apply algorithm
Information Processing Letters
LLVMVF: A Generic Approach for Verification of Multicore Software
Journal of Electronic Testing: Theory and Applications
Verification and enforcement of access control policies
Formal Methods in System Design
An OBDD approach to enforce confidentiality and visibility constraints in data publishing
Journal of Computer Security - DBSec 2011
LTL translation improvements in Spot 1.0
International Journal of Critical Computer-Based Systems
BDD-based heuristics for binary optimization
Journal of Heuristics
Towards Automatic Composition of Web Services: SAT-Based Concretisation of Abstract Scenarios
Fundamenta Informaticae
Journal of Computer Security - Foundational Aspects of Security
Counterexample-guided abstraction refinement for linear programs with arrays
Automated Software Engineering
Hi-index | 15.16 |
In this paper we present a new data structure for representing Boolean functions and an associated set of manipulation algorithms. Functions are represented by directed, acyclic graphs in a manner similar to the representations introduced by Lee [1] and Akers [2], but with further restrictions on the ordering of decision variables in the graph. Although a function requires, in the worst case, a graph of size exponential in the number of arguments, many of the functions encountered in typical applications have a more reasonable representation. Our algorithms have time complexity proportional to the sizes of the graphs being operated on, and hence are quite efficient as long as the graphs do not grow too large. We present experimental results from applying these algorithms to problems in logic design verification that demonstrate the practicality of our approach.