Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Synchronous circuit verification by symbolic simulation: an illustration
AUSCRYPT '90 Proceedings of the sixth MIT conference on Advanced research in VLSI
Introduction to HOL: a theorem proving environment for higher order logic
Introduction to HOL: a theorem proving environment for higher order logic
Linking BDD-based symbolic evaluation to interactive theorem-proving
DAC '93 Proceedings of the 30th international Design Automation Conference
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal verification by symbolic evaluation of partially-ordered trajectories
Formal Methods in System Design - Special issue on symbolic model checking
The formal verification of a pipelined double-precision IEEE floating-point multiplier
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
ML for the working programmer (2nd ed.)
ML for the working programmer (2nd ed.)
An Industrial Strength Theorem Prover for a Logic Based on Common Lisp
IEEE Transactions on Software Engineering
Combining theorem proving and trajectory evaluation in an industrial environment
DAC '98 Proceedings of the 35th annual Design Automation Conference
Formal verification using parametric representations of Boolean constraints
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Derivation and Use of Induction Schemes in Higher-Order Logic
TPHOLs '97 Proceedings of the 10th International Conference on Theorem Proving in Higher Order Logics
The Village Telephone System: A Case Study in Formal Software Engineering
Proceedings of the 11th International Conference on Theorem Proving in Higher Order Logics
Adding External Decision Procedures to HOL90 Securely
Proceedings of the 11th International Conference on Theorem Proving in Higher Order Logics
Processor Verification with Precise Exeptions and Speculative Execution
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
An Integration of Model Checking with Automated Proof Checking
Proceedings of the 7th International Conference on Computer Aided Verification
Symbolic Trajectory Evaluation
Formal Hardware Verification - Methods and Systems in Comparison
LFP '84 Proceedings of the 1984 ACM Symposium on LISP and functional programming
A simple theorem prover based on symbolic trajectory evaluation and BDD's
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Methodology for Large-Scale Hardware Verification
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Reachability Programming in HOL98 Using BDDs
TPHOLs '00 Proceedings of the 13th International Conference on Theorem Proving in Higher Order Logics
Divider Circuit Verification with Model Checking and Theorem Proving
TPHOLs '00 Proceedings of the 13th International Conference on Theorem Proving in Higher Order Logics
PuzzleTool: An Example of Programming Computation and Deduction
TPHOLs '02 Proceedings of the 15th International Conference on Theorem Proving in Higher Order Logics
TYPES '00 Selected papers from the International Workshop on Types for Proofs and Programs
Hierarchical Verification Using an MDG-HOL Hybrid Tool
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Applications of Hierarchical Verification in Model Checking
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Proof Engineering in the Large: Formal Verification of Pentium® 4 Floating-Point Divider
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
PROSPER - An Investigation into Software Architecture for Embedded Proof Engines
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Formal Verification Methods for Industrial Hardware Design
SOFSEM '01 Proceedings of the 28th Conference on Current Trends in Theory and Practice of Informatics Piestany: Theory and Practice of Informatics
A MuDDy Experience---ML Bindings to a BDD Library
DSL '09 Proceedings of the IFIP TC 2 Working Conference on Domain-Specific Languages
Formalization of the DE2 language
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
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Combining theorem proving and model checking offers the tantalizing possibility of efficiently reasoning about large circuits at high levels of abstraction. We have constructed a system that seamlessly integrates symbolic trajectory evaluation based model checking with theorem proving in a higher-order classical logic. The approach is made possible by using the same programming language (fl) as both the meta and object language of theorem proving. This is done by "lifting" fl, essentially deeply embedding fl in itself. The approach is a pragmatic solution that provides an efficient and extensible Verification environment. Our approach is generally applicable to any dialect of the ML programming language and any model-checking algorithm that has practical inference rules for combining results.