“Logic wins!”

  • Authors:
  • Jean Goubault-Larrecq

  • Affiliations:
  • LSV, ENS Cachan, CNRS, INRIA Saclay, Cachan, France

  • Venue:
  • ASIAN'09 Proceedings of the 13th Asian conference on Advances in Computer Science: information Security and Privacy
  • Year:
  • 2009

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Abstract

Clever algorithm design is sometimes superseded by simple encodings into logic. We apply this motto to a few case studies in the formal verification of security properties. In particular, we examine confidentiality objectives in hardware circuit descriptions written in VHDL.