A design methodology for secured ICs using dynamic current mode logic

Authors:
François Macé;François-Xavier Standaert;Jean-Jacques Quisquater;Jean-Didier Legat
Affiliations:
UCL Crypto Group, Microelectronics Laboratory, Universite Catholique de Louvain;UCL Crypto Group, Microelectronics Laboratory, Universite Catholique de Louvain;UCL Crypto Group, Microelectronics Laboratory, Universite Catholique de Louvain;UCL Crypto Group, Microelectronics Laboratory, Universite Catholique de Louvain
Venue:
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Year:
2005

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Abstract

This paper presents principles and concepts for the secured design of cryptographic IC's. In order to achieve a secure implementation of those structures, we propose to use a Binary Decision Diagrams (BDDs) approach to design and determine the most secured structures in Dynamic Current Mode Logic. We apply a BDD based prediction to the power consumption of some gates, validate our model using SPICE simulations, and use it to mount efficient power analysis attacks on a component of a cryptographic algorithm. Moreover, relying on our simulation results, we propose a complete methodology based on our BDD model to obtain secured IC's, from the boolean function to the final circuit layout.