Reducing cache misses by application-specific re-configurable indexing

Authors:
K. Patel;E. Macii;L. Benini;M. Poncino
Affiliations:
Politecnico di Torino, Italy;Politecnico di Torino, Italy;Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA;Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., PA, USA
Venue:
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Year:
2004

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Abstract

The predictability of memory access patterns in embedded systems can be successfully exploited to devise effective application-specific cache optimizations. In this work, we propose an improved indexing scheme for direct-mapped caches, which drastically reduces the number of conflict misses by using application-specific information; the scheme is based on the selection of a subset of the address bits. With respect to similar approaches, our solution has two main strengths. First, it models the misses analytically by building a miss equation, and exploits a symbolic algorithm to compute the exact optimum solution (i.e., the subset of address bits to be used as cache index that minimizes conflict misses). Second, we designed a re-configurable bit selector, which can be programmed at run-time to fit the optimal cache indexing to a given application. Results show an average reduction of conflict misses of 24%, measured over a set of standard benchmarks, and for different cache configurations.