Transistor reordering for low power CMOS gates using an SP-BDD representation

  • Authors:
  • Alexey L. Glebov;David Blaauw;Larry G. Jones

  • Affiliations:
  • NIISAPRAN, Academy of Science of Russia;Semiconductor Systems Design Technology, Motorola, Inc.;Semiconductor Systems Design Technology, Motorola, Inc.

  • Venue:
  • ISLPED '95 Proceedings of the 1995 international symposium on Low power design
  • Year:
  • 1995

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Abstract