Aesop: a tool for automated transistor sizing
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Algorithms for automatic transistor sizing in CMOS digital circuits
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Delay reduction using simulated annealing
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Transistor reordering for low power CMOS gates using an SP-BDD representation
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Transistor reordering for power minimization under delay constraint
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The future of custom cell generation in physical synthesis
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power optimization for FPGA look-up tables
Proceedings of the 1997 international symposium on Physical design
Optimizing CMOS Circuits for Low Power Using Transistor Reordering
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Circuit optimization for minimisation of power consumption under delay constraint
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
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