Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
HSIS: a BDD-based environment for formal verification
DAC '94 Proceedings of the 31st annual Design Automation Conference
Incorporating speculative execution in exact control-dependent scheduling
DAC '94 Proceedings of the 31st annual Design Automation Conference
Symbolic execution of data paths
GLSVLSI '95 Proceedings of the Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
Concurrent analysis techniques for data path timing optimization
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Scheduling and binding bounds for RT-level symbolic execution
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Verification of RTL generated from scheduled behavior in a high-level synthesis flow
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A new approach to assembly software retargeting for microcontrollers
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Quick piping: a fast, high-level model for describing processor pipelines
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Retargetable Generation of Code Selectors from HDL Processor Models
EDTC '97 Proceedings of the 1997 European conference on Design and Test
| Hi-index | 0.00 |