High-performance computer architecture
High-performance computer architecture
The SPARC architecture manual: version 8
The SPARC architecture manual: version 8
MIPS RISC architectures
Essentials of programming languages
Essentials of programming languages
Alpha architecture reference manual
Alpha architecture reference manual
Detecting pipeline structural hazards quickly
POPL '94 Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Symbolic modeling and evaluation of data paths
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Employing finite automata for resource scheduling
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Efficient instruction scheduling using finite state automata
International Journal of Parallel Programming - Special issue on instruction-level parallel processing—part I
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Optimization of machine descriptions for efficient use
International Journal of Parallel Programming - Special issue: MICRO-29, 29th annual IEEE/ACM international symposium on microarchitecture
Hancock: a language for processing very large-scale data
Proceedings of the 2nd conference on Domain-specific languages
Retargetable Code Generation for Digital Signal Processors
Retargetable Code Generation for Digital Signal Processors
Code Generation for Embedded Processors
Code Generation for Embedded Processors
Literate Programming Simplified
IEEE Software
The Advantages of Machine-Dependent Global Optimization
Proceedings of the International Conference on Programming Languages and System Architectures
Retargetable Generation of Code Selectors from HDL Processor Models
EDTC '97 Proceedings of the 1997 European conference on Design and Test
The mimola design system: Tools for the design of digital processors
DAC '84 Proceedings of the 21st Design Automation Conference
Automatic Generation of Microarchitecture Simulators
ICCL '98 Proceedings of the 1998 International Conference on Computer Languages
Microprocessor Specification in Hawk
ICCL '98 Proceedings of the 1998 International Conference on Computer Languages
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Proceedings of the 12th international symposium on System synthesis
Csdl: reusable computing system descriptions for retargetable systems software
Csdl: reusable computing system descriptions for retargetable systems software
Computer structures: Readings and examples (McGraw-Hill computer science series)
Computer structures: Readings and examples (McGraw-Hill computer science series)
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
CASL: A rapid-prototyping language for modern micro-architectures
Computer Languages, Systems and Structures
Hi-index | 0.00 |
Responding to marketplace needs, today's embedded processors must feature a flexible core that allows easy modification with fast time to market. In this environment, embedded processors are increasingly reliant on flexible support tools. This paper presents one such tool, called Quick Piping, a new, high-level formalism for modeling processor pipelines. Quick Piping consists of three primary components that together provide an easy-to-build, reus驴able processor description: Pipeline graphs-a new high-level formalism for model驴ing processor pipelines,pipe--a companion domain-specific language for specify驴ing a pipeline graph, pipe miner--a compiler specification generator for pipe descriptions. pipe miner processes a pipe description and produces a compiler specification that is used to build a compiler that reads the corresponding machine's instruc驴tion set and automatically generates resource vectors.Despite their ubiquity and importance in achieving high perfor驴mance in modern processors, pipelines--and improving the mech驴anisms for specifying their operation--have received little attention. Until now, handwritten resource vectors have served to specify information about a processor's pipeline and encode rele驴vant information about each instruction's resource usage. Describ驴ing the complete set of resource vectors for a machine can be quite tedious and error prone, since it commonly must be developed by hand on an instruction-by-instruction basis.With its use of pipeline graphs, the pipe language, and the pipe miner compiler specification generator, Quick Piping gives the embedded processor architect and compiler writer an intuitive high-level abstraction of pipelines, a language for specifying a pipeline, and a tool for automatically producing pipeline resource vectors. The resulting specifications are quick to develop, easy to understand, simple to modify and maintain, and can be automati驴cally processed to produce the low-level information required by processor control units and instruction schedulers.