Systolic structures: A notion and characterization
Journal of Parallel and Distributed Computing
The Marion system for retargetable instruction scheduling
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
MIPS RISC architectures
Optimally profiling and tracing programs
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Employing finite automata for resource scheduling
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
ACM Computing Surveys (CSUR)
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
DCG: an efficient, retargetable dynamic code generation system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A formal model and specification language for procedure calling conventions
POPL '95 Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Schedulers as abstract interpretations of higher-dimensional automata
PEPM '95 Proceedings of the 1995 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
Efficient instruction scheduling using finite state automata
Proceedings of the 28th annual international symposium on Microarchitecture
A reduced multipipeline machine description that preserves scheduling constraints
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Instruction scheduling and executable editing
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Optimization of machine descriptions for efficient use
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Resource usage models for instruction scheduling: two new models and a classification
ICS '99 Proceedings of the 13th international conference on Supercomputing
Quick piping: a fast, high-level model for describing processor pipelines
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory
International Journal of Parallel Programming
Optimization of Machine Descriptions for Efficient Use
International Journal of Parallel Programming
Static resource models for code-size efficient embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Improved Preprocessing Methods for Modulo Scheduling Algorithms
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions
Proceedings of the 12th international symposium on System synthesis
An Enhanced Co-Scheduling Method using Reduced MS-State Diagrams
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Automatic Detection and Diagnosis of Faults in Generated Code for Procedure Calls
IEEE Transactions on Software Engineering
RTGEN: an algorithm for automatic generation of reservation tables from architectural descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Transition aware scheduling: increasing continuous idle-periods in resource units
Proceedings of the 2nd conference on Computing frontiers
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Algebraic topology and concurrency
Theoretical Computer Science - Clifford lectures and the mathematical foundations of programming semantics
Inter-block Scoreboard Scheduling in a JIT Compiler for VLIW Processors
Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
Resource conflict detection in simulation of function unit pipelines
Journal of Systems Architecture: the EUROMICRO Journal
Policies of System Level Pipeline Modeling
Electronic Notes in Theoretical Computer Science (ENTCS)
Retargetable pipeline hazard detection for partially bypassed processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
A SystemC library for specifying pipeline abstractions
Microprocessors & Microsystems
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