Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
IMPACT: an architectural framework for multiple-instruction-issue processors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
COMPCON '92 Proceedings of the thirty-seventh international conference on COMPCON
The multiflow trace scheduling compiler
The Journal of Supercomputing - Special issue on instruction-level parallelism
The Journal of Supercomputing - Special issue on instruction-level parallelism
Detecting pipeline structural hazards quickly
POPL '94 Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Iterative modulo scheduling: an algorithm for software pipelining loops
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Efficient instruction scheduling using finite state automata
Proceedings of the 28th annual international symposium on Microarchitecture
A reduced multipipeline machine description that preserves scheduling constraints
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Employing finite automata for resource scheduling
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Developing the AMD-K5 Architecture
IEEE Micro
A representation for the analysis of microprogram operation
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
A Control Word Model for detecting conflicts between microprograms
MICRO 8 Proceedings of the 8th annual workshop on Microprogramming
The optimization of horizontal microcode within and beyond basic blocks: an application of processor scheduling with resources
Resource usage models for instruction scheduling: two new models and a classification
ICS '99 Proceedings of the 13th international conference on Supercomputing
EXPRESSION: a language for architecture exploration through compiler/simulator retargetability
DATE '99 Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computers
A technique for QoS-based system partitioning
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Static resource models for code-size efficient embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
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