LimitLESS directories: A scalable cache coherence scheme
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Tradeoffs in supporting two page sizes
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
ACM SIGMETRICS Performance Evaluation Review
Architecture support for single address space operating systems
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Waiting algorithms for synchronization in large-scale multiprocessors
ACM Transactions on Computer Systems (TOCS)
Practical data breakpoints: design and implementation
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Scheduling time-critical instructions on RISC machines
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM SIGOPS Operating Systems Review
ACM SIGOPS Operating Systems Review
Developing parallel applications using high-performance simulation
PADD '93 Proceedings of the 1993 ACM/ONR workshop on Parallel and distributed debugging
Weighted sum codes for error detection and their comparison with existing codes
IEEE/ACM Transactions on Networking (TON)
Division by invariant integers using multiplication
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Shade: a fast instruction-set simulator for execution profiling
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Remarks on A methodology for implementing highly concurrent data
ACM SIGPLAN Notices
Surpassing the TLB performance of superpages with less operating system support
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
DCG: an efficient, retargetable dynamic code generation system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Notes on “A methodology for implementing highly concurrent data objects”
ACM Transactions on Programming Languages and Systems (TOPLAS)
Optimizing parallel programs with explicit synchronization
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Object-oriented programming for embedded systems
ACM SIGPLAN Notices
A geometric approach to integer condition codes and branch instructions
ACM SIGCSE Bulletin
Fast software implementation of error detection codes
IEEE/ACM Transactions on Networking (TON)
A new page table for 64-bit address spaces
SOSP '95 Proceedings of the fifteenth ACM symposium on Operating systems principles
Hierarchical Execution to Speed Up Pipeline Interlock in Mainframe Computers
IEEE Transactions on Computers
C: a language for high-level, efficient, and machine-independent dynamic code generation
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Automatic incremental state saving
PADS '96 Proceedings of the tenth workshop on Parallel and distributed simulation
Implementing signatures for C++
ACM Transactions on Programming Languages and Systems (TOPLAS)
The performance potential of data dependence speculation & collapsing
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Automatic checking of instruction specifications
ICSE '97 Proceedings of the 19th international conference on Software engineering
MIDEE: smoothing branch and instruction cache miss penalties on deep pipelines
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Specifying representations of machine instructions
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Code placement techniques for cache miss rate reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient instruction cache simulation and execution profiling with a threaded-code interpreter
Proceedings of the 29th conference on Winter simulation
An Executable Specification and Verifier for Relaxed Memory Order
IEEE Transactions on Computers - Special issue on cache memory and related problems
Pipeline behavior prediction for superscalar processors by abstract interpretation
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
APRIL: a processor architecture for multiprocessing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Reducing the cost of branches by using registers
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
A realization of a concurrent object-oriented programming
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
Program path analysis to bound cache-related preemption delay in preemptive real-time systems
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Boosting superpage utilization with the shadow memory and the partial-subblock TLB
Proceedings of the 14th international conference on Supercomputing
Memory consistency and process coordination for SPARC v8 multiprocessors (brief announcement)
Proceedings of the nineteenth annual ACM symposium on Principles of distributed computing
Instruction scheduling for power reduction in processor-based system design
Proceedings of the conference on Design, automation and test in Europe
A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation
Journal of VLSI Signal Processing Systems
Operating system performance and large servers
EW 6 Proceedings of the 6th workshop on ACM SIGOPS European workshop: Matching operating systems to application needs
Functioning without closure: type-safe customized function representations for standard ML
Proceedings of the sixth ACM SIGPLAN international conference on Functional programming
Generic control flow reconstruction from assembly code
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Quick piping: a fast, high-level model for describing processor pipelines
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ACM SIGAda Ada Letters - Exception handling for a 21st century programming language proceedings
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Micro
Faster Numerical Algorithms Via Exception Handling
IEEE Transactions on Computers
A Performance and Cost Analysis of Applying Superscalar Method to Mainframe Computers
IEEE Transactions on Computers
A Unified Formalization of Four Shared-Memory Models
IEEE Transactions on Parallel and Distributed Systems
A transformational approach to binary translation of delayed branches
ACM Transactions on Programming Languages and Systems (TOPLAS)
Dynamic Path Profile Aided Recompilation in a JAVA Just-In-Time Compiler
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
Memory Consistency and Process Coordination for SPARC Multiprocessors
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Do Object-Oriented Languages Need Special Hardware Support?
ECOOP '95 Proceedings of the 9th European Conference on Object-Oriented Programming
Verified Optimizations for the Intel IA-64 Architecture
TPHOLs '00 Proceedings of the 13th International Conference on Theorem Proving in Higher Order Logics
General Purpose Prototyping Platform for Data-Processor Research and Development
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Memory Access Schemes for Configurable Processors
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Optimal Code Placement of Embedded Software for Instruction Caches
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Distributed Prefetch-buffer/Cache Design for High Performance Memory Systems
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
A model for parallel simulation of distributed shared memory
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
Size-Constrained Code Placement for Cache Miss Rate Reduction
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Increasing the number of effective registers in a low-power processor using a windowed register file
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Automatic test program generation for pipelined processors
Proceedings of the 2003 ACM symposium on Applied computing
Pragmatic aspects of reusable program generators
Journal of Functional Programming
Automatic Test Program Generation: A Case Study
IEEE Design & Test
Register windows vs. register allocation
ACM SIGPLAN Notices - Best of PLDI 1979-1999
iWatcher: Efficient Architectural Support for Software Debugging
Proceedings of the 31st annual international symposium on Computer architecture
AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Catenation and specialization for Tcl virtual machine performance
Proceedings of the 2004 workshop on Interpreters, virtual machines and emulators
Efficient and flexible architectural support for dynamic monitoring
ACM Transactions on Architecture and Code Optimization (TACO)
New evolutionary techniques for test-program generation for complex microprocessor cores
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor
IEEE Transactions on Computers
Automatic generation of test sets for SBST of microprocessor IP cores
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Efficient Use of Invisible Registers in Thumb Code
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
uComplexity: Estimating Processor Design Effort
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Dusty caches for reference counting garbage collection
MEDEA '05 Proceedings of the 2005 workshop on MEmory performance: DEaling with Applications , systems and architecture
Specifying memory consistency of write buffer multiprocessors
ACM Transactions on Computer Systems (TOCS)
Performance of Switch Blocking on Multithreaded Architectures
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
The New Jersey machine-code toolkit
TCON'95 Proceedings of the USENIX 1995 Technical Conference Proceedings
What is Itanium Memory Consistency from the Programmer's Point of View?
Electronic Notes in Theoretical Computer Science (ENTCS)
Introduction to formal processor verification at logic level: a case study
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
JTRES '07 Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems
Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study
Integration, the VLSI Journal
Study of the Effects of SEU-Induced Faults on a Pipeline Protected Microprocessor
IEEE Transactions on Computers
The spring nucleus: a microkernel for objects
Usenix-stc'93 Proceedings of the USENIX Summer 1993 Technical Conference on Summer technical conference - Volume 1
Specification-driven directed test generation for validation of pipelined processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Concepts for Autonomous Control Flow Checking for Embedded CPUs
ATC '08 Proceedings of the 5th international conference on Autonomic and Trusted Computing
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
DS-RT '08 Proceedings of the 2008 12th IEEE/ACM International Symposium on Distributed Simulation and Real-Time Applications
Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs
International Journal of Autonomous and Adaptive Communications Systems
Generating Optimal Code Using Answer Set Programming
LPNMR '09 Proceedings of the 10th International Conference on Logic Programming and Nonmonotonic Reasoning
A Better x86 Memory Model: x86-TSO
TPHOLs '09 Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics
A transformational approach to binary translation of delayed branches with applications to SPARC® and PA-RISC instructions sets
Early experience with a commercial hardware transactional memory implementation
Early experience with a commercial hardware transactional memory implementation
An enhanced framework for microprocessor test-program generation
EuroGP'03 Proceedings of the 6th European conference on Genetic programming
Flexible and efficient sandboxing based on fine-grained protection domains
ISSS'02 Proceedings of the 2002 Mext-NSF-JSPS international conference on Software security: theories and systems
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Communications of the ACM
Thermal-aware compilation for system-on-chip processing architectures
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Simplifying concurrent algorithms by exploiting hardware transactional memory
Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures
A real-time Java chip-multiprocessor
ACM Transactions on Embedded Computing Systems (TECS)
Reasoning about the implementation of concurrency abstractions on x86-TSO
ECOOP'10 Proceedings of the 24th European conference on Object-oriented programming
microSPARCTM: a case-study of scan based debug
ITC'94 Proceedings of the 1994 international conference on Test
A case-study in the use of scan in microSPARCTM testing and debug
ITC'94 Proceedings of the 1994 international conference on Test
Relaxed-memory concurrency and verified compilation
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
An automata-based symbolic approach for verifying programs on relaxed memory models
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Architecting robustness and timeliness in a new generation of aerospace systems
Architecting dependable systems VII
Understanding POWER multiprocessors
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
The impact of memory models on software reliability in multiprocessors
Proceedings of the 30th annual ACM SIGACT-SIGOPS symposium on Principles of distributed computing
On the power of hardware transactional memory to simplify memory management
Proceedings of the 30th annual ACM SIGACT-SIGOPS symposium on Principles of distributed computing
An evaluation of hash functions on a power analysis resistant processor architecture
WISTP'11 Proceedings of the 5th IFIP WG 11.2 international conference on Information security theory and practice: security and privacy of mobile devices in wireless communication
Design and implementation of a Ravenscar extension for multiprocessors
Ada-Europe'11 Proceedings of the 16th Ada-Europe international conference on Reliable software technologies
ORK+/XtratuM: an open partitioning platform for Ada
Ada-Europe'11 Proceedings of the 16th Ada-Europe international conference on Reliable software technologies
A verification-based approach to memory fence insertion in relaxed memory systems
Proceedings of the 18th international SPIN conference on Model checking software
The Journal of Supercomputing
An operating system design for the security architecture for microprocessors
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
TOAST: applying answer set programming to superoptimisation
ICLP'06 Proceedings of the 22nd international conference on Logic Programming
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Parameterized memory models and concurrent separation logic
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
Soundness of data flow analyses for weak memory models
APLAS'11 Proceedings of the 9th Asian conference on Programming Languages and Systems
Configurable fine-grain protection for multicore processor virtualization
Proceedings of the 39th Annual International Symposium on Computer Architecture
Vigilare: toward snoop-based kernel integrity monitor
Proceedings of the 2012 ACM conference on Computer and communications security
A formal hierarchy of weak memory models
Formal Methods in System Design
Instruction set extensions for pairing-based cryptography
Pairing'07 Proceedings of the First international conference on Pairing-Based Cryptography
Memory monitor module for embedded systems
Computers and Electrical Engineering
A verification-based approach to memory fence insertion in PSO memory systems
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Fast RMWs for TSO: semantics and implementation
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
CompCertTSO: A Verified Compiler for Relaxed-Memory Concurrency
Journal of the ACM (JACM)
FORTUNA-A framework for the design and development of hardware-based secure systems
Journal of Systems and Software
ASIST: architectural support for instruction set randomization
Proceedings of the 2013 ACM SIGSAC conference on Computer & communications security
Fence-free work stealing on bounded TSO processors
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Hardware acceleration for programs in SSA form
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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