Memory access buffering in multiprocessors
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Correct memory operation of cache-based multiprocessors
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Principles of concurrent and distributed programming
Principles of concurrent and distributed programming
Proving sequential consistency of high-performance shared memories (extended abstract)
SPAA '91 Proceedings of the third annual ACM symposium on Parallel algorithms and architectures
The SPARC architecture manual: version 8
The SPARC architecture manual: version 8
Reasoning about parallel architectures
Reasoning about parallel architectures
Formal specification of abstract memory models
Proceedings of the 1993 symposium on Research on integrated systems
The SPARC architecture manual (version 9)
The SPARC architecture manual (version 9)
The PowerPC architecture: a specification for a new family of RISC processors
The PowerPC architecture: a specification for a new family of RISC processors
Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
IEEE Transactions on Software Engineering
Alpha AXP architecture reference manual (2nd ed.)
Alpha AXP architecture reference manual (2nd ed.)
Memory consistency models for shared-memory multiprocessors
Memory consistency models for shared-memory multiprocessors
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Memory consistency and event ordering in scalable shared-memory multiprocessors
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Distributed Shared Memory: Concepts and Systems
Distributed Shared Memory: Concepts and Systems
The Murphi Verification System
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Specifying multithreaded Java semantics for program verification
Proceedings of the 24th International Conference on Software Engineering
Specifying Java thread semantics using a uniform memory model
JGI '02 Proceedings of the 2002 joint ACM-ISCOPE conference on Java Grande
Memory Consistency and Process Coordination for SPARC Multiprocessors
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Formal Reasoning about Hardware and Software Memory Models
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Toward a decidable notion of sequential consistency
Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model
Proceedings of the 31st annual international symposium on Computer architecture
Specifying memory consistency of write buffer multiprocessors
ACM Transactions on Computer Systems (TOCS)
Memory model sensitive bytecode verification
Formal Methods in System Design
Java memory model aware software validation
Proceedings of the 8th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering
Validating power architecture™ technology-based MPSoCs through executable specifications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
State-space exploration for concurrent algorithms under weak memory orderings: (preliminary version)
ACM SIGARCH Computer Architecture News
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Communications of the ACM
Reasoning about the implementation of concurrency abstractions on x86-TSO
ECOOP'10 Proceedings of the 24th European conference on Object-oriented programming
Partial-coherence abstractions for relaxed memory models
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Automatic inference of memory fences
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Generating litmus tests for contrasting memory consistency models
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Consistency models for replicated data
Replication
Dynamic synthesis for relaxed memory models
Proceedings of the 33rd ACM SIGPLAN conference on Programming Language Design and Implementation
Automatic inference of memory fences
ACM SIGACT News
An O(1)-barriers optimal RMRs mutual exclusion algorithm: extended abstract
Proceedings of the 2013 ACM symposium on Principles of distributed computing
Multi-core systems modeling for formal verification of parallel algorithms
ACM SIGOPS Operating Systems Review
CDSchecker: checking concurrent data structures written with C/C++ atomics
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
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The Mur$\varphi$ description language and verification system for finite-state concurrent systems is applied to the problem of specifying a family of multiprocessor memory models described in the SPARC Version 9 architecture manual. The description language allows for a straightforward operational description of the memory model which can be used as a specification for programmers and machine architects. The automatic verifier can be used to generate all possible outcomes of small assembly language multiprocessor programs in a given memory model, which is very helpful for understanding the subtleties of the model. The verifier can also check the correctness of assembly language programs including synchronization routines. This paper describes the memory models and their encoding in the Mur$\varphi$ description language. We describe how synchronization routines can be verified and how finite state programs can be analyzed. We also present some interesting findings from the verification and the analysis.