Evolution of the PowerPC Architecture
IEEE Micro
An executable specification, analyzer and verifier for RMO (relaxed memory order)
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Implementing sequentially consistent shared objects using broadcast and point-to-point communication
Journal of the ACM (JACM)
Lamport clocks: verifying a directory cache-coherence protocol
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
Using “test model-checking” to verify the Runway-PA8000 memory model
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
Formal verification of complex coherence protocols using symbolic state models
Journal of the ACM (JACM)
Retrospective: weak ordering—a new definition
25 years of the international symposia on Computer architecture (selected papers)
An Executable Specification and Verifier for Relaxed Memory Order
IEEE Transactions on Computers - Special issue on cache memory and related problems
A system-level specification framework for I/O architectures
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Specifying Java thread semantics using a uniform memory model
JGI '02 Proceedings of the 2002 joint ACM-ISCOPE conference on Java Grande
An Efficient Partial Order Reduction Algorithm with an Alternative Proviso Implementation
Formal Methods in System Design
IEEE Micro
Bounding the number of segment histories during data race detection
Parallel Computing
Verification Methods for Weaker Shared Memory Consistency Models
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
A Specification and Verification Framework for Developing Weak Shared Memory Consistency Protocols
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Using Timestamping and History Variables to Verify Sequential Consistency
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture
IEEE Transactions on Parallel and Distributed Systems
Relationships between memory models
Information Processing Letters
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model
Proceedings of the 31st annual international symposium on Computer architecture
A unified theory of shared memory consistency
Journal of the ACM (JACM)
Proving refinement using transduction
Distributed Computing - Special issue: Verification of lazy caching
Memory Model = Instruction Reordering + Store Atomicity
Proceedings of the 33rd annual international symposium on Computer Architecture
Store Atomicity for Transactional Memory
Electronic Notes in Theoretical Computer Science (ENTCS)
Memory model sensitive bytecode verification
Formal Methods in System Design
First silicon functional validation and debug of multicore microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reasoning about the ARM weakly consistent memory model
Proceedings of the 2008 ACM SIGPLAN workshop on Memory systems performance and correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08)
The semantics of x86-CC multiprocessor machine code
Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Validating power architecture™ technology-based MPSoCs through executable specifications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Complete formal specification of the OpenMP memory model
International Journal of Parallel Programming
Some resources for teaching concurrency
Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging
The design of a task parallel library
Proceedings of the 24th ACM SIGPLAN conference on Object oriented programming systems languages and applications
Formal specification of the OpenMP memory model
IWOMP'05/IWOMP'06 Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming
Litmus: running tests against hardware
TACAS'11/ETAPS'11 Proceedings of the 17th international conference on Tools and algorithms for the construction and analysis of systems: part of the joint European conferences on theory and practice of software
Understanding POWER multiprocessors
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Threadmill: a post-silicon exerciser for multi-threaded processors
Proceedings of the 48th Design Automation Conference
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
A memory model sensitive checker for c#
FM'06 Proceedings of the 14th international conference on Formal Methods
Fences in weak memory models (extended version)
Formal Methods in System Design
A formal hierarchy of weak memory models
Formal Methods in System Design
Robust architectural support for transactional memory in the power architecture
Proceedings of the 40th Annual International Symposium on Computer Architecture
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