Memory access buffering in multiprocessors
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Modeling concurrency with partial orders
International Journal of Parallel Programming
Prespecification in data refinement
Information Processing Letters
Hierarchical correctness proofs for distributed algorithms
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
Efficient and correct execution of parallel programs that share memory
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proving entailment between conceptual state specifications
Theoretical Computer Science - First European Symposium on Programming, Saarbru:9Aicken, W. Germany, March 17:8
A simple approach to specifying concurrent systems
Communications of the ACM
Process simulation and refinement
Formal Aspects of Computing
Refinement and projection of relational specifications
REX workshop Proceedings on Stepwise refinement of distributed systems: models, formalisms, correctness
Completing the temporal picture
Selected papers of the 16th international colloquium on Automata, languages, and programming
Refining interfaces of communicating systems
TAPSOFT '91 Proceedings of the international joint conference on theory and practice of software development on Advances in distributed computing (ADC) and colloquium on combining paradigms for software development (CCPSD): Vol. 2
The existence of refinement mappings
Theoretical Computer Science
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Reasoning about parallel architectures
Reasoning about parallel architectures
ACM Transactions on Programming Languages and Systems (TOPLAS)
Compositional specification and verification of distributed systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
The directory-based cache coherence protocol for the DASH multiprocessor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Specifying Concurrent Program Modules
ACM Transactions on Programming Languages and Systems (TOPLAS)
An HDLC protocol specification and its verification using image protocols
ACM Transactions on Computer Systems (TOCS)
Verifying Safety and Deadlock Properties of Networks of Asynchronously Communicating Processes
Proceedings of the IFIP WG6.1 Ninth International Symposium on Protocol Specification, Testing and Verification IX
Specifiying and Proving Communication Closedness in Protocols
Proceedings of the IFIP TC6/WG6.1 Thirteenth International Symposium on Protocol Specification, Testing and Verification XIII
Simulations Between Specifications of Distributed Systems
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
Interface Refinement in Reactive Systems (Extended Abstract)
CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
Modeling concurrency by partial orders and nonlinear transition systems
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Sequential consistency and the lazy caching algorithm
Distributed Computing - Special issue: Verification of lazy caching
Extending Memory Consistency of Finite Prefixes to Infinite Computations
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Using Timestamping and History Variables to Verify Sequential Consistency
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Eternity Variables to Simulate Specifications
MPC '02 Proceedings of the 6th International Conference on Mathematics of Program Construction
Eternity variables to prove simulation of specifications
ACM Transactions on Computational Logic (TOCL)
Distributed Computing - Special issue: Verification of lazy caching
Universal extensions to simulate specifications
Information and Computation
Abstraction for concurrent objects
Theoretical Computer Science
Simplifying linearizability proofs with reduction and abstraction
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Relaxing property preservation in the refinement of concurrent systems
2FACS'97 Proceedings of the 2nd BCS-FACS conference on Northern Formal Methods
Specification and Verification of Concurrent Programs Through Refinements
Journal of Automated Reasoning
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When designing distributed systems, one is faced with the problem of verifying a refinement between two specifications, given at different levels of abstraction. Suggested verification techniques in the literature include refinement mappings and various forms of simulation. We present a verification method, in which refinement between two systems is proven by constructing a transducer that inputs a computation of a concrete system and outputs a matching computation of the abstract system. The transducer uses a FIFO queue that holds segments of the concrete computation that have not been matched yet. This allows a finite delay between the occurrence of a concrete event and the determination of the corresponding abstract event. This delay often makes the use of prophecy variables or backward simulation unnecessary.An important generalization of the method is to prove refinement modulo some transformation on the observed sequences of events. The method is adapted by replacing the FIFO queue by a component that allows the appropriate transformation on sequences of events. A particular case is partial-order refinement, i.e., refinement that preserves only a subset of the orderings between events of a system. Examples are sequential consistency and serializability. The case of sequential consistency is illustrated on a proof of sequential consistency of a cache protocol.