BYTE
ATUM: a new technique for capturing address traces using microcode
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Mimic: a fast system/370 simulator
SIGPLAN '87 Papers of the Symposium on Interpreters and interpretive techniques
Two-level hybrid interpreter/native code execution for combined space-time program efficiency
SIGPLAN '87 Papers of the Symposium on Interpreters and interpretive techniques
The rice parallel processing testbed
SIGMETRICS '88 Proceedings of the 1988 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Extension and software development
ICSE '88 Proceedings of the 10th international conference on Software engineering
Efficient instruction level simulation of computers
Transactions of the Society for Computer Simulation International
An efficient implementation of SELF a dynamically-typed object-oriented language based on prototypes
OOPSLA '89 Conference proceedings on Object-oriented programming systems, languages and applications
Techniques for efficient inline tracing on a shared-memory multiprocessor
SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
A portable interface for on-the-fly instruction space modification
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
The SPARC architecture manual: version 8
The SPARC architecture manual: version 8
Dynascope: a tool for program directing
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Migrating a CISC computer family onto RISC via object code translation
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Address tracing of parallel systems via TRAPEDS
Microprocessors & Microsystems
Communications of the ACM
The Wisconsin Wind Tunnel: virtual prototyping of parallel computers
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
ATOM: a system for building customized program analysis tools
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Rewriting executable files to measure program behavior
Software—Practice & Experience
The Meerkat multicomputer: tradeoffs in multicomputer architecture
The Meerkat multicomputer: tradeoffs in multicomputer architecture
Generation and analysis of very long address traces
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Multiplexed Buses: the Endian Wars Continue
IEEE Micro
Optimizing Dynamically-Typed Object-Oriented Languages With Polymorphic Inline Caches
ECOOP '91 Proceedings of the European Conference on Object-Oriented Programming
A Design for Efficient Simulation of a Multiprocessor
MASCOTS '93 Proceedings of the International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Efficient implementation of the smalltalk-80 system
POPL '84 Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
A software high performance APL interpreter
APL '79 Proceedings of the international conference on APL: part 1
The Dynamic Incremental Compiler of APL\3000
APL '79 Proceedings of the international conference on APL: part 1
PROTEUS: A HIGH-PERFORMANCE PARALLEL-ARCHITECTURE SIMULATOR
PROTEUS: A HIGH-PERFORMANCE PARALLEL-ARCHITECTURE SIMULATOR
The accuracy of trace-driven simulations of multiprocessors
The accuracy of trace-driven simulations of multiprocessors
Caching Function Results: Faster Arithmetic by Avoiding Unnecessary Computation
Caching Function Results: Faster Arithmetic by Avoiding Unnecessary Computation
Shade: A Fast Instruction Set Simulator for Execution Profiling
Shade: A Fast Instruction Set Simulator for Execution Profiling
Trap-driven simulation with Tapeworm II
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A fast and flexible performance simulator for micro-architecture trade-off analysis on UltraSPARC-I
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Talisman: fast and accurate multicomputer simulation
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Active memory: a new abstraction for memory-system simulation
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Instruction fetching: coping with code bloat
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
VCODE: a retargetable, extensible, very fast dynamic code generation system
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Embra: fast and flexible machine simulation
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Micro-architecture evaluation using performance vectors
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
The structure and performance of interpreters
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Trap-driven memory simulation with Tapeworm II
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Active memory: a new abstraction for memory system simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Using the SimOS machine simulator to study complex computer systems
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Modeling cost/performance of a parallel computer simulator
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Automatic checking of instruction specifications
ICSE '97 Proceedings of the 19th international conference on Software engineering
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
Specifying representations of machine instructions
ACM Transactions on Programming Languages and Systems (TOPLAS)
tcc: a system for fast, flexible, and high-level dynamic code generation
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Application-driven synthesis of core-based systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Efficient instruction cache simulation and execution profiling with a threaded-code interpreter
Proceedings of the 29th conference on Winter simulation
Characterization and improvement of load/store cache-based prefetching
ICS '98 Proceedings of the 12th international conference on Supercomputing
Low load latency through sum-addressed memory (SAM)
Proceedings of the 25th annual international symposium on Computer architecture
Searching for the sorting record: experiences in tuning NOW-Sort
SPDT '98 Proceedings of the SIGMETRICS symposium on Parallel and distributed tools
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors
IEEE Transactions on Parallel and Distributed Systems
JRes: a resource accounting interface for Java
Proceedings of the 13th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Fast out-of-order processor simulation using memoization
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Area efficient architectures for information integrity in cache memories
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
A retargetable, ultra-fast instruction set simulator
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Architectural requirements and scalability of the NAS parallel benchmarks
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Mapping irregular applications to DIVA, a PIM-based data-intensive architecture
SC '99 Proceedings of the 1999 ACM/IEEE conference on Supercomputing
Power optimization of system-level address buses based on software profiling
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Software performance estimation strategies in a system-level design tool
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Function-level power estimation methodology for microprocessors
Proceedings of the 37th Annual Design Automation Conference
Efficient performance prediction for modern microprocessors
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Copy detection for intellectual property protection of VLSI designs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Machine-adaptable dynamic binary translation
DYNAMO '00 Proceedings of the ACM SIGPLAN workshop on Dynamic and adaptive compilation and optimization
A Framework for Computer Performance Evaluation Using Benchmark Sets
IEEE Transactions on Computers
A design framework to efficiently explore energy-delay tradeoffs
Proceedings of the ninth international symposium on Hardware/software codesign
Facile: a language and compiler for high-performance processor simulators
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Compiler support for block buffering
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Fast, flexible, cycle-accurate energy estimation
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Morphable Cache Architectures: Potential Benefits
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Exploiting scratch-pad memory using Presburger formulas
Proceedings of the 14th international symposium on Systems synthesis
Full-system timing-first simulation
SIGMETRICS '02 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Compiler-directed cache polymorphism
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Going the distance for TLB prefetching: an application-driven study
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Tuning garbage collection for reducing memory system energy in an embedded java environment
ACM Transactions on Embedded Computing Systems (TECS)
An ultra-fast instruction set simulator
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Complete Computer System Simulation: The SimOS Approach
IEEE Parallel & Distributed Technology: Systems & Technology
FX!32: A Profile-Directed Binary Translator
IEEE Micro
Partitioned instruction cache architecture for energy efficiency
ACM Transactions on Embedded Computing Systems (TECS)
Influence of Array Allocation Mechanisms on Memory System Energy
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Iteration Space Slicing for Locality
LCPC '99 Proceedings of the 12th International Workshop on Languages and Compilers for Parallel Computing
Quantifying Differences between OpenMP and MPI Using a Large-Scale Application Suite
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Trace-Driven Memory Simulation: A Survey
Performance Evaluation: Origins and Directions
Adaptive Garbage Collection for Battery-Operated Environments
Proceedings of the 2nd Java Virtual Machine Research and Technology Symposium
Design Tradeoffs for Embedded Network Processors
ARCS '02 Proceedings of the International Conference on Architecture of Computing Systems: Trends in Network and Pervasive Computing
The performance advantage of applying compression to the memory system
Proceedings of the 2002 workshop on Memory system performance
Energy savings through compression in embedded Java environments
Proceedings of the tenth international symposium on Hardware/software codesign
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Proceedings of the 40th annual Design Automation Conference
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Retargetable and reconfigurable software dynamic translation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
An infrastructure for adaptive dynamic optimization
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Bridge: a retargetable extensive profiling tool
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
A brief history of just-in-time
ACM Computing Surveys (CSUR)
Dynamic native optimization of interpreters
Proceedings of the 2003 workshop on Interpreters, virtual machines and emulators
High-level algorithmic complexity evaluation for system design
Journal of Systems Architecture: the EUROMICRO Journal
An efficient retargetable framework for instruction-set simulation
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Tracking object life cycle for leakage energy optimization
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Considering processing cost in network simulations
MoMeTools '03 Proceedings of the ACM SIGCOMM workshop on Models, methods and tools for reproducible network research
Static analysis of parameterized loop nests for energy efficient use of data caches
Compilers and operating systems for low power
Tuning In-Sensor Data Filtering to Reduce Energy Consumption in Wireless Sensor Networks
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Collecting whole-system reference traces of multiprogrammed and multithreaded workloads
WOSP '04 Proceedings of the 4th international workshop on Software and performance
Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
ANSS '04 Proceedings of the 37th annual symposium on Simulation
RABIT: A New Framework for Runtime Emulation and Binary Translation
ANSS '04 Proceedings of the 37th annual symposium on Simulation
Solemn: Solaris Emulation Mode for Sparc Sulima
ANSS '04 Proceedings of the 37th annual symposium on Simulation
The design and implementation of FIT: a flexible instrumentation toolkit
Proceedings of the 5th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering
Analyzing heap error behavior in embedded JVM environments
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices
IEEE Transactions on Parallel and Distributed Systems
Automatic Synthesis of High-Speed Processor Simulators
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Maintaining Consistency and Bounding Capacity of Software Code Caches
Proceedings of the international symposium on Code generation and optimization
An efficient and generic reversible debugger using the virtual machine based approach
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
TraceBack: first fault diagnosis by reconstruction of distributed control flow
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Improving java virtual machine reliability for memory-constrained embedded systems
Proceedings of the 42nd annual Design Automation Conference
Nonintrusive precision instrumentation of microcontroller software
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Data space-oriented tiling for enhancing locality
ACM Transactions on Embedded Computing Systems (TECS)
Memory access optimizations in instruction-set simulators
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
DynamoSim: a trace-based dynamically compiled instruction set simulator
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Analyzing data reuse for cache reconfiguration
ACM Transactions on Embedded Computing Systems (TECS)
Object duplication for improving reliability
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Thread-Shared Software Code Caches
Proceedings of the International Symposium on Code Generation and Optimization
Constructing Virtual Architectures on a Tiled Processor
Proceedings of the International Symposium on Code Generation and Optimization
Optimizing Dynamic Binary Translation for SIMD Instructions
Proceedings of the International Symposium on Code Generation and Optimization
Improving the energy behavior of block buffering using compiler optimizations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Dynamic binary translation using run-time feedbacks
Science of Computer Programming - Software analysis, evolution and re-engineering
The ArchC architecture description language and tools
International Journal of Parallel Programming
Performance prediction of paging workloads using lightweight tracing
Future Generation Computer Systems - Systems performance analysis and evaluation
A retargetable framework for instruction-set architecture simulation
ACM Transactions on Embedded Computing Systems (TECS)
Compile-time planning for overhead reduction in software dynamic translators
International Journal of Parallel Programming - Special issue: The next generation software program
Managing bounded code caches in dynamic binary optimization systems
ACM Transactions on Architecture and Code Optimization (TACO)
A comparison of software and hardware techniques for x86 virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Software-based instruction caching for embedded processors
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
A dynamic binary instrumentation engine for the ARM architecture
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Design and Implementation of aWorkload Specific Simulator
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
Framework for instruction-level tracing and analysis of program executions
Proceedings of the 2nd international conference on Virtual execution environments
HDTrans: an open source, low-level dynamic instrumentation system
Proceedings of the 2nd international conference on Virtual execution environments
An Integrated Development Of A Dynamic Software-Fault Monitoring System
Journal of Integrated Design & Process Science
HDTrans: a low-overhead dynamic translator
ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News
Ultra fast cycle-accurate compiled emulation of inorder pipelined architectures
Journal of Systems Architecture: the EUROMICRO Journal
Understanding data lifetime via whole system simulation
SSYM'04 Proceedings of the 13th conference on USENIX Security Symposium - Volume 13
Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems
Proceedings of the International Symposium on Code Generation and Optimization
PinOS: a programmable framework for whole-system dynamic instrumentation
Proceedings of the 3rd international conference on Virtual execution environments
BIT: a tool for instrumenting java bytecodes
USITS'97 Proceedings of the USENIX Symposium on Internet Technologies and Systems on USENIX Symposium on Internet Technologies and Systems
Energy behavior of java applications from the memory perspective
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
Experiences integrating research tools and projects into computer architecture courses
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
The SimCore/Alpha Functional Simulator
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
A fast and generic hybrid simulation approach using C virtual machine
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
An integrated ARM and multi-core DSP simulator
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Process-shared and persistent code caches
Proceedings of the fourth ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Proceedings of the 2007 Summer Computer Simulation Conference
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Accurate and scalable simulation of network of heterogeneous sensor devices
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Resource conflict detection in simulation of function unit pipelines
Journal of Systems Architecture: the EUROMICRO Journal
Processor Description Languages
Processor Description Languages
High Speed CPU Simulation Using LTU Dynamic Binary Translation
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation
ACM Transactions on Embedded Computing Systems (TECS)
Precise simulation of interrupts using a rollback mechanism
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
An effective synchronization approach for fast and accurate multi-core instruction-set simulation
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
A transformational approach to binary translation of delayed branches with applications to SPARC® and PA-RISC instructions sets
Development of a high-level simulation approach and its application to multicore video decoding
IEEE Transactions on Circuits and Systems for Video Technology
A real system evaluation of hardware atomicity for software speculation
Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems
A self-adjusting code cache manager to balance start-up time and memory usage
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Resource conflict detection in simulation of function unit pipelines
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Decoupled lifeguards: enabling path optimizations for dynamic correctness checking tools
PLDI '10 Proceedings of the 2010 ACM SIGPLAN conference on Programming language design and implementation
DisIRer: Converting a retargetable compiler into a multiplatform binary translator
ACM Transactions on Architecture and Code Optimization (TACO)
The evolution of an x86 virtual machine monitor
ACM SIGOPS Operating Systems Review
The structural simulation toolkit
ACM SIGMETRICS Performance Evaluation Review - Special issue on the 1st international workshop on performance modeling, benchmarking and simulation of high performance computing systems (PMBS 10)
Evaluating indirect branch handling mechanisms in software dynamic translation systems
ACM Transactions on Architecture and Code Optimization (TACO)
Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Evaluation of data-parallel H.264 decoding approaches for strongly resource-restricted architectures
Multimedia Tools and Applications
Performance optimization by dynamic code transformation
Proceedings of the 8th ACM International Conference on Computing Frontiers
A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation
Proceedings of the 48th Design Automation Conference
A cache-pinning strategy for improving generational garbage collection
HiPC'06 Proceedings of the 13th international conference on High Performance Computing
VSim: Simulating multi-server setups at near native hardware speed
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
A high performance simulator system for a multiprocessor system based on a multi-way cluster
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
Issues and support for dynamic register allocation
ACSAC'06 Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture
The Java Virtual Machine in retargetable, high-performance instruction set simulation
Proceedings of the 9th International Conference on Principles and Practice of Programming in Java
Ultra fast cycle-accurate compiled emulation of inorder pipelined architectures
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
A universal parallel front-end for execution driven microarchitecture simulation
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation
ACM Transactions on Computer Systems (TOCS)
A survey on cache tuning from a power/energy perspective
ACM Computing Surveys (CSUR)
Boosting instruction set simulator performance with parallel block optimisation and replacement
ACSC '12 Proceedings of the Thirty-fifth Australasian Computer Science Conference - Volume 122
Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Tracing tools are used widely to help analyze, design, and tune both hardware and software systems. This paper describes a tool called Shade which combines efficient instruction-set simulation with a flexible, extensible trace generation capability. Efficiency is achieved by dynamically compiling and caching code to simulate and trace the application program. The user may control the extent of tracing in a variety of ways; arbitrarily detailed application state information may be collected during the simulation, but tracing less translates directly into greater efficiency. Current Shade implementations run on SPARC systems and simulate the SPARC (Versions 8 and 9) and MIPS I instruction sets. This paper describes the capabilities, design, implementation, and performance of Shade, and discusses instruction set emulation in general.